Method and apparatus for transmission and reception of data streams in digital video broadcasting systems

ABSTRACT

A method of transmitting data in a wireless communication system is provided. The method comprises mapping service data onto a first set of multiple Physical Layer Pipes (PLPs), mapping the first set of multiple PLPs onto a first set of logical frames, wherein each of the first set of logical frames is of the same size, forming a first logical channel comprising the first set of logical frames, and transmitting the mapped service data over a target delivery system.

PRIORITY

This patent application is a continuation application of a priorapplication Ser. No. 13/857,668, filed on Apr. 5, 2013, which claims thebenefit under 35 U.S.C. §119(a) of a United Kingdom patent applicationfiled on Aug. 24, 2012 and assigned Serial No. GB 1215130.4, and aUnited Kingdom patent application filed on May 10, 2012 and assignedSerial No. GB 1208389.5, the entire disclosure of each of which ishereby incorporated by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to wireless communication systems. Moreparticularly, the present invention relates to signal processors,communication units, a communication system and methods relating totransmission and reception of data streams in Digital Video Broadcasting(DVB) systems.

2. Description of the Related Art

A wireless broadcast system, such as a DVB system, may transmit data inthe form of a sequence of frames. A DVB system may, for example, operateaccording to a Terrestrial 2^(nd) Generation (DVB-T2) standard, aDVB-Next Generation Handheld (DVB-NGH) standard, or for example,according to the following families of standards: Advanced TelevisionsSystems Committee (ATSC), Integrated Services Digital Broadcasting(ISDB), or Digital Multimedia Broadcasting (DMB). Each frame typicallycomprises a preamble section and a data section, the preamble sectionand the data section being time-multiplexed. The data section may carrydata that is arranged in the form of a number of data streams that maybe referred to as Physical Layer Pipes (PLP). A PLP may carry, forexample, a service, such as a video channel provided to a user.Reception of data from the frames, and reception of the data streams,may be assisted by signaling, which may typically be carried in thepreamble of the frame, in which case the signaling may be referred to asOut-of-Band (OB) signaling and/or the signaling may be carried in thedata section, typically of the preceding frame, in which case thesignaling may be referred to as In-Band (IB) signaling. The signalingmay be referred to as physical layer signaling, or Layer 1 (L1)signaling.

The preamble section of a frame may include various parts, including anL1-Config (configuration) part and an L1-Dyn (dynamic) part. TheL1-Config part typically carries information which is valid for eachframe of the super-frame, and is typically the same for each frame ofthe super-frame. The L1-Dyn part carries information which may vary fromone frame to the next.

With increasing use of signal compression techniques, and provision oflower data rate services that may be more robust particularly in mobileenvironments, the number of PLPs carried by a sequence of frames ispotentially large, for example in DVB-T2 up to 255 PLPs may besupported. As at least some of the information transmitted variesbetween the different PLPs, the signaling information transmitted in thepreamble portion may represent a large overhead per frame in terms ofdata capacity. More particularly, the L1-Config part typically takes upa high proportion (for example, more than 60%) of the signalinginformation of the preamble section. Therefore, the overhead resultingfrom the L1-Config is particularly high.

DVB systems supporting provision of multimedia content, such as DVB-T2,have in general the following resources: a number (N) of RadioFrequencies (RF) (where N≧1), each with a given bandwidth (B), and wherethe signal on each RF frequency occupies a given time duration (D).

FIG. 1 illustrates a generic frame structure for provision of transportstreams of data according to the related art.

Referring to FIG. 1, a frame structure 100 illustrates data services 102and 104 generally arranged in transport streams, e.g., a stream of datapackets 106, for delivery over a target DVB system. One goal indesigning a multimedia data structure, such as in DVB-NGH is to organizeefficiently and flexibly the delivery of the transport streams withinthe physical resources of the DVB system.

Each transmitted frame (and therefore the subsequently received frame)118 typically comprises a preamble section 112 and a data section 114,both of which are time-multiplexed. The transmitted received frames 118are sent on two radio frequencies, RF1 108, RF2 110 in this simpleillustration. The data section 114 may carry data that is arranged inthe form of a number of data streams that may be referred to as PLP. APLP may carry, for example, a service, such as a video channel providedto a user. Reception of data decoded from the received frames may beassisted by use of signaling fields/data/bits, and the like, which maytypically be carried in the preamble section 112 of the frame. Thesignaling is often referred to as physical layer signaling, or L1signaling. The signaling may indicate a modulation or coding scheme tobe used for decoding data, and it may for example indicate sections of adata field to be decoded, or the location of a data stream within thedata section.

DVB frame structures may provide physical slots within the DVB physicalframe structure, which are reserved in a standard for future use, forexample referred to as Future Extension Frame (FEF) slots 116, which aretime multiplexed with a given DVB-T2 signal. For example, FEF slots 116may be provided for transmission of signals intended for reception bymobile DVB receivers in addition to transmission of signals intended forreception by fixed DVB receivers of the related art.

DVB systems may provide for the transmission of signals specificallyintended for reception by hand held devices, such as NGH receivers. Suchsignals may be, for example, of lower bandwidth and have more robustmodulation and coding than signals intended for reception by fixedreceivers.

There have been recent proposals to use the additional physical slots inDVB-T2, such as the FEF slots, for the transmission of DVB-NGH signalsintended for reception by handheld receivers. Typically, a frame for thetransmission of a signal intended for reception by a handheld receiverwould be transmitted within the additional physical slot of a sequenceof frames for the transmission of a signal intended for fixed receivers,including signaling information for the frame, which would be typicallytransmitted as a preamble in each FEF slot 116.

However, such a scheme will suffer from a limited capacity, due to theshort physical slot duration and relatively high signaling overhead.Furthermore, such a scheme will be limited in terms of achievablestatistical multiplexing gain, due to the limited capacity that may beachieved as a consequence of the relatively few PLPs being available foruse.

Therefore, a need exists for signal processors, communication units, awireless system and methods relating to transmission and reception ofdata streams in DVB systems that may address one or more deficiencies ofthe related art.

The above information is presented as background information only toassist with an understanding of the present disclosure. No determinationhas been made, and no assertion is made, as to whether any of the abovemight be applicable as prior art with regard to the present invention.

SUMMARY OF THE INVENTION

Aspects of the present invention are to address at least theabove-mentioned problems and/or disadvantages and to provide at leastthe advantages described below. Accordingly, an aspect of the presentinvention is to provide signal processors, communication units, acommunication system, and methods relating to transmission and receptionof data streams in Digital Video Broadcasting (DVB) systems.

In accordance with an aspect of the present invention, a method oftransmitting data in a wireless communication system is provided. Themethod includes mapping service data onto a first set of multiplePhysical Layer Pipes (PLPs), mapping the first set of multiple PLPs ontoa first set of logical frames, wherein each of the first set of logicalframes is of the same size, forming a first logical channel comprisingthe first set of logical frames, and transmitting the mapped servicedata over a target delivery system.

In accordance with another aspect of the present invention, a networkgateway comprising a processor is provided. The processor is arranged tomap service data onto a first set of multiple PLPs, map the first set ofmultiple PLPs onto a first set of logical frames, wherein each of thefirst set of logical frames is of the same size, form a first logicalchannel comprising the first set of logical frames, and transmit themapped service data over a target delivery system.

In accordance with another aspect of the present invention, anintegrated circuit comprising a processor is provided. The processor isarranged to map service data onto a first set of multiple PLPs, map thefirst set of multiple PLPs onto a first set of logical frames, whereineach of the first set of logical frames is of the same size, form afirst logical channel comprising the first set of logical frames, andtransmit the mapped service data over a target delivery system.

Other aspects, advantages, and salient features of the invention willbecome apparent to those skilled in the art from the following detaileddescription, which, taken in conjunction with the annexed drawings,discloses exemplary embodiments of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects features, and advantages of certainexemplary embodiments of the present invention will be more apparentfrom the following description taken in conjunction with theaccompanying drawings, in which:

FIG. 1 illustrates a generic frame structure for provision of transportstreams of data according to the related art;

FIG. 2 is a schematic diagram of a data frame according to an exemplaryembodiment of the present invention;

FIG. 3A is a schematic diagram of a frame structure according to anexemplary embodiment of the present invention;

FIG. 3B illustrates a table of data carried in Layer 1-Configuration(L1-Config) signaling portion of a frame according to an exemplaryembodiment of the present invention;

FIG. 4 is a flow diagram of a process for arranging different types ofconfiguration data items according to a first exemplary embodiment ofthe present invention;

FIG. 5A is a flow diagram of processes performed by a transmissionapparatus when transmitting data according to the first exemplaryembodiment of the present invention;

FIG. 5B is a flow diagram of processes performed by a receiver whenreceiving data according to the first exemplary embodiment of thepresent invention;

FIG. 6A is a schematic diagram of a first exemplary arrangement of dataconfiguration items in a sequence of frames according to a secondexemplary embodiment of the present invention;

FIG. 6B is a schematic diagram of a second exemplary arrangement of dataconfiguration items in a sequence of frames according to the firstexemplary embodiment of the present invention;

FIG. 7 is a flow diagram of a process for arranging configuration dataitems in different types according to the second exemplary embodiment ofthe present invention;

FIG. 8A is a flow diagram of processes performed by a transmissionapparatus when transmitting data according to the second exemplaryembodiment of the present invention;

FIG. 8B is a flow diagram of processes performed by a receiver whenreceiving data according to the second exemplary embodiment of thepresent invention;

FIG. 9 is a schematic diagram of a third exemplary arrangement of dataconfiguration items arranged in a frame sequence according to anexemplary embodiment of the present invention;

FIG. 10 is a schematic diagram of data carried in a frame structurebeing decoded according to an exemplary embodiment of the presentinvention;

FIG. 11 is a schematic diagram of a system according to an exemplaryembodiment of the present invention;

FIG. 12 is a table of data carried in an L1-Config signaling portion ofa frame according to an exemplary embodiment of the present invention;

FIGS. 13A and 13B illustrate a table of data carried in an L1-Configsignaling portion of a frame according to an exemplary embodiment of thepresent invention;

FIG. 14A is a schematic diagram of an exemplary arrangement of dataconfiguration items in a sequence of frames according to an exemplaryembodiment of the present invention;

FIG. 14B is a schematic diagram of an exemplary arrangement of dataconfiguration items in a sequence of frames according to an exemplaryembodiment of the present invention;

FIG. 15 illustrates an overview of some elements of a Digital VideoBroadcasting (DVB) system adapted according to an exemplary embodimentof the present invention;

FIG. 16 illustrates a block diagram of a receiver wireless communicationunit according to an exemplary embodiment of the present invention;

FIG. 17 illustrates a logical frame structure according to an exemplaryembodiment of the present invention;

FIG. 18 illustrates a mechanism for mapping Physical Layer Pipes (PLPs)in a logical frame structure according to an exemplary embodiment of thepresent invention;

FIG. 19 illustrates a mechanism for mapping PLPs in a logical framestructure with identified frame types according to an exemplaryembodiment of the present invention;

FIG. 20 illustrates a mechanism for incorporating an input streamsynchronization field in a logical frame structure according to anexemplary embodiment of the present invention;

FIG. 21 illustrates a logical super-frame structure according to anexemplary embodiment of the present invention;

FIG. 22 illustrates a logical channel structure comprising a sequence oflogical frames according to an exemplary embodiment of the presentinvention;

FIG. 23 illustrates a logical channel Type-A structure comprising asequence of logical frames according to an exemplary embodiment of thepresent invention;

FIG. 24 illustrates a logical channel Type-B structure comprising asequence of logical frames according to an exemplary embodiment of thepresent invention;

FIG. 25 illustrates a logical channel Type-C structure comprising asequence of logical frames according to an exemplary embodiment of thepresent invention;

FIG. 26 illustrates a logical channel Type-D structure comprising asequence of logical frames according to an exemplary embodiment of thepresent invention;

FIGS. 27A and 27B illustrate a table of an L1-Pre signaling field in alogical channel structure according to an exemplary embodiment of thepresent invention;

FIG. 28 illustrates a table of an L1-Pre signaling format for a logicalchannel type according to an exemplary embodiment of the presentinvention;

FIG. 29 illustrates a flowchart of an initial scanning operation of areceiver receiving a logical channel according to an exemplaryembodiment of the present invention;

FIG. 30 illustrates a flowchart of a normal continuous receptionoperation of a receiver receiving a logical channel according to anexemplary embodiment of the present invention;

FIG. 31 illustrates an overview of stages for a transport of dataservices in a delivery system according to an exemplary embodiment ofthe present invention; and

FIG. 32 illustrates a computing system that may be employed to implementsignal processing functionality according to an exemplary embodiment ofthe present invention.

Throughout the drawings, it should be noted that like reference numbersare used to depict the same or similar elements, features, andstructures.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

The following description with reference to the accompanying drawings isprovided to assist in a comprehensive understanding of exemplaryembodiments of the invention as defined by the claims and theirequivalents. It includes various specific details to assist in thatunderstanding but these are to be regarded as merely exemplary.Accordingly, those of ordinary skill in the art will recognize thatvarious changes and modifications of the embodiments described hereincan be made without departing from the scope and spirit of theinvention. In addition, descriptions of well-known functions andconstructions may be omitted for clarity and conciseness.

The terms and words used in the following description and claims are notlimited to the bibliographical meanings, but, are merely used by theinventor to enable a clear and consistent understanding of theinvention. Accordingly, it should be apparent to those skilled in theart that the following description of exemplary embodiments of thepresent invention is provided for illustration purpose only and not forthe purpose of limiting the invention as defined by the appended claimsand their equivalents.

It is to be understood that the singular forms “a,” “an,” and “the”include plural referents unless the context clearly dictates otherwise.Thus, for example, reference to “a component surface” includes referenceto one or more of such surfaces.

By the term “substantially” it is meant that the recited characteristic,parameter, or value need not be achieved exactly, but that deviations orvariations, including for example, tolerances, measurement error,measurement accuracy limitations and other factors known to those ofskill in the art, may occur in amounts that do not preclude the effectthe characteristic was intended to provide.

By way of example, exemplary embodiments of the present invention willnow be described in the context of a Digital Video Broadcasting-NextGeneration Handheld (DVB-NGH) standard based on a 2^(nd) generationTerrestrial DVB-T2 system.

However, it will be understood that this is by way of example only andthat other exemplary embodiments may involve other wireless broadcastsystems and are not limited to the use for transmission of digital videosignals.

In some exemplary embodiments of the present invention, data istransmitted using Orthogonal Frequency Division Multiplexing (OFDM). Thefollowing examples refer to the transmission of data in Physical LayerPipes (PLPs). However, it will be understood that the invention is notlimited to such arrangements, and other types of data streams may beused.

FIG. 2 is a schematic diagram of a data frame according to an exemplaryembodiment of the present invention.

Referring to FIG. 2, a data frame 200 comprises a preamble section 202and a data section 204. The preamble section 202 comprises signalingportions “P1” 206, “L1-pre” 208, “L1-Config” 210, “L1-Dyn” 212,“L1-Dynamic Extension” 214 and a Cyclic Redundancy Check (CRC) 216 and“L1 Padding” 218. The data section carries payload data, such as datatransmitted in PLPs. Although not shown in FIG. 1, the data section 204also includes multiple portions for transmitting different types ofpayload data.

Typically, the P1 signaling portion 206 contains data identifying thepreamble. The L1-Pre signaling portion 208 typically contains signalinginformation relating at least to the modulation and coding scheme neededto receive the remainder of the preamble.

As described above, the L1-Config signaling portion 210 carriesinformation that is valid for each frame 200 of a given superframe, andis typically the same for each frame of the superframe. The informationcarried by the L1-Config signaling portion 210 includes configurationdata, such as data items indicating a number of PLPs carried within thesuperframe, or the modulation type used by an associated PLP. Furtherexamples of the configuration data items carried in the L1-Config part210 are described below. The term “configuration data item” as usedherein may refer, for example, to all configuration data included in thesignaling part of a given frame relating to a given PLP, or it may referto a part of such data.

As described above, the L1-Dyn signaling portion 212 carries informationthat varies from frame to frame, and relates to decoding the PLPs withinthe frame 200. For example, the L1-Dyn signaling portion 212 may includean index of the frame 200 within the superframe and or a start addressof a PLP.

The L1-Dynamic Extension signaling portion 214 allows for the inclusionof further signaling information not included in the other portions. TheCRC part 216 includes CRC-codes for the detection of transmission errorsat the receiver. The L1 Padding part 218 is a variable-length field andis inserted following the CRC field to ensure that multiple Low DensityParity Check (LDPC) blocks of the L1-post signaling (i.e., the partssubsequent to the Pre signaling portion 208) have the same informationsize when the L1-post signaling is segmented into multiple blocks andthese blocks are separately encoded.

Different signaling portions of the preamble 202 may be encoded togetheror separately for transmission. For example, the L1-Config signalingportion 210 may be coded together with, or separate from, the L1-Dynsignaling portion 212.

As mentioned above, the data section 204 carries data arranged in PLPs.However, it will be understood that each PLP is not necessarily mappedto every frame 200.

In exemplary embodiments of the present invention, different repetitionlengths are set for different types of configuration data item so thatdifferent types of configuration item are repeated according todifferent lengths within a frame structure comprising multiple frames.

FIG. 3A is a schematic diagram of a frame structure according to anexemplary embodiment of the present invention.

Referring to FIG. 3A, a frame structure 300 comprises n frames in whichdifferent configuration data items P_(nm) are transmitted in each frameof the frame structure 300. FIG. 3A shows data included in the L1-Configsignaling portion 210 of each frame and the other parts of the framesare omitted for conciseness.

The data included in the L1-Config signaling portion 210 comprisesconstant data 302 and configuration data 304. The constant data 302comprises configuration information which is independent of anyparticular PLP. Typically, the constant data 302 comprises signalinginformation items, such as Time Frequency Slicing (TFS) items, FutureExtension Frame (FEF) signaling information items and/or auxiliarystreams information items, which are required to be transmitted in eachframe.

The configuration data 304 includes configuration data items which eachrelate to one or more PLPs, and are for use in receiving the one or morePLPs to which they relate. The configuration data items are separatedinto different types 304 a . . . 304N, with different repetition lengthsbeing set for each of the different types of configuration data item. Inthe notation used herein, P_(nm) indicates configuration data itemshaving a repetition length n such that they are repeated every n frames,and which are first transmitted in frame m. Although not shown in FIG.3A, the frames may also include additional data, such as dummy datarelating to dummy PLPs. Such data may also be assigned a repetitionlength, as is described below.

Thus, in the example of FIG. 3A, configuration data items P₁₁ arerepeated in every frame, configuration data items P₂₁ are repeated inframes 1, 3, 5 . . . , configuration data items P₂₂ are repeated inframes 2, 4, 6 . . . , and so on. In the example shown, the lowestrepetition length set is that for the configuration data items P_(Nm)which are repeated every n frames. The repetition length n thus definesa number of frames (n−1) which sequentially follow in the framestructure before a type of configuration data item having a repetitionlength n is repeated.

Accordingly, each configuration data item is included at least once inthe frame structure 300. However, since not all of configuration dataitems are repeated during each frame of the frame structure 300, lessdata is required to be transmitted during each frame, resulting in asaving in terms of signaling overhead compared to prior art methods inwhich all configuration data items are transmitted in every frame.

Furthermore, since different repetition lengths are set for differenttypes of configuration data item, the delay in decoding which occurs atthe receiver at, for example, initialization or in the event of changingchannels (“zapping” delay), can be controlled according to, for example,the service requirements of the PLP to which a given configuration dataitem relates (the average delay in receiving a configuration data itemwhich is repeated every n frames being n/2 times the length of eachframe). Thus, configuration data items relating to PLPs for which a longdelay is undesirable may be allocated a lower repetition length thanconfiguration data items relating to PLPs for which a delay may betolerable.

In some cases it may be desirable to set different repetition lengthsfor different PLPs carrying data relating to different parts of the sameservice, so that, for example, a basic version of the service can beprovided with minimal expected delay, with an enhanced version of theservice becoming subsequently available. For example, the basis versionof the service may use a Single-Input and Single-Output (SISO)configuration, with the enhanced version using a Multiple-Input andMultiple-Output (MIMO) configuration of the same service. In the case oftransmission using a Scalable Video Coding (SVC) scheme, configurationdata items for receiving the base layer of the scheme may be transmittedat a higher repetition length than the configuration data items forreceiving the enhanced layer of the scheme. Accordingly, the receivermay initially decode the base stream and display the transmission to theuser, immediately after the configuration data items for the base layerhave been received, without having to wait for those relating to theenhanced layer.

Although the frame structure 300 shown in FIG. 3A includes only N frames(a number equal to the longest repetition length for the transmission),it will be appreciated that there is no limit to the length of a framestructure according to which data is transmitted. For example, in someexemplary embodiments of the present invention, the length of the framestructure may be equal to the lowest common multiplier of all framerepetition lengths. The frames of the frame structure may be arrangedinto superframes. The maximum repetition length, or maximum cyclelength, set for the transmission may be selected such that the length ofa superframe is equal to, or a multiple of, N.

FIG. 3B illustrates a table of data carried in an L1-Config signalingportion of a frame according to an exemplary embodiment of the presentinvention.

Referring to FIG. 3B, the table includes constant data 302 andconfiguration data 304, along with exemplary corresponding data sizes,included in the L1-Config signaling portion 210 of a frame. Moreparticularly, the constant data 302 includes the data item“Num_PLP_config” 302 a which indicates the number of PLPs for whichconfiguration data 304 is included in each frame. The configuration data304 includes various configuration data items. It should be understoodthat the term “configuration data items” may relate to either dataincluded in a single field within the configuration data, or to dataincluded in a set of related fields. In this exemplary embodiment, anidentifier of the PLP is identified in the configuration data item“PLP_ID” 306. In a new field in accordance with an exemplary embodiment,the configuration data item “L1Config_Repetition_Length” 308 indicatesthe repetition length of the configuration data items relating to thePLP identified. Although shown as a new field here, the“L1Config_Repetition_Length” 308 is included in an extension field, suchas “Reserved_(—)1” field.

In some exemplary embodiments of the present invention, theconfiguration data items are ordered for transmission based on theirrepetition length, so that configuration data items having a lowerrepetition length are transmitted before those having a higherrepetition length. Configuration data items having the same repetitionlength may further be ordered so that they are transmitted in order ofthe PLP_ID 306 of the PLP to which they relate. For example, theconfiguration data items may be arranged in ascending order. By orderingthe configuration data items in a predictable way, the receiver mayanticipate the PLPs to which configuration data items transmitted insubsequent frames relate, as is described below.

First Exemplary Transmission Method

FIG. 4 is a flow diagram of a process for arranging different types ofconfiguration data items according to an exemplary embodiment of thepresent invention.

Referring to FIG. 4, at step S400, for a given repetition length n, aset (referred to herein as S_(n)) of a number Qn of unallocated PLPshaving a desired repetition length of n is determined. As mentionedabove, the desired repetition length may be determined based on theidentification of a service requirement, set by a network operator forexample, in relation to each of the PLP.

At step S402, it is determined whether Q_(n) is equal to or a multipleof n (e.g., if n is 4, it is determined whether QN is 4, 8, 12 . . . ,or whether it is a number which is not a multiple of 4). If it isdetermined that Q_(n) is not equal to n, or a multiple thereof,configuration data for a PLP having a desired repetition length of n+1is added to the set S_(n), so that the value of Q_(n) increases by 1 atstep S404. This step is performed based on the observation that theservice for PLP requiring a repetition length of n+1 suffers from nodegradation, and in fact is improved, by reduction the repetition lengthto n. After step S404, the process returns to step S402, and steps S402and S404 are repeated until the value of Q_(n) is determined to be equalto or a multiple of n.

When it is determined at step S402 that Q_(n) is equal to or a multipleof n, the number P_(n) of PLPs for which corresponding configurationdata items are transmitted at a repetition length n is set at Q_(n) atstep S406. In other words, the configuration data items included inS_(n) once the condition that Q_(n) is equal to or a multiple of n issatisfied are categorized as being of a type having a repetition lengthn, with S₁, S₂, S₃, and S_(N) corresponding respectively to data types204 a, 204 b, 204 c and 204 _(N) described above in reference to FIG. 2.

Thereafter, the process proceeds to step S408 in which the configurationdata items included in S_(n) are further categorized into n groupsP_(n1) . . . P_(nn), corresponding to the data items P_(nm) describedabove in relation to FIG. 2. Typically, the P_(nm) for any given valueof n are selected to include configuration data items relating to thesame number of PLPs irrespective of the value of m.

At step S410 it is determined whether there are any PLPs for which thecorresponding configuration data items have not yet been allocated(i.e., for which no repetition length has been set) during the processof FIG. 4. If it is determined that there are configuration data itemsthat have not yet been allocated, the value of n is incremented at stepS412 and the process returns to step S400 and repeats using theincremented value of n. If there are no further configuration data itemsto be allocated, the process proceeds to step S414 where transmission ofthe data in accordance with the frames arranged in the preceding stepsis initiated.

By repeating this process incrementally for values of n between aminimum and a maximum value, configuration data items for all PLPs arecategorized into different types having a repetition length which is setat a value equal to or less than a desired repetition length determinedbased on a service requirement associated with the PLP, ensuring thatthe quality of service is maintained at or above the desired level. Atthe same time, since the number of PLPs having a repetition length lessthan the desired length is kept to a minimum, the saving in signalingoverhead achieved by not repeating all configuration data items in eachframe can be maximized.

It should be noted that in the above process it was assumed at step S404that there existed a PLP having desired repetition length of n+1. In thecase that there is no such PLP, configuration data items for a PLPshaving a desired repetition of more than n+1 may be used. If theconfiguration data for all PLPs has already been allocated (i.e., if nis at the maximum value for the PLPs being transmitted), dummyconfiguration data items relating to dummy PLPs may instead be used.Additionally or alternatively, configuration data relating to one ormore already allocated PLPs may be repeated, to ensure that Q_(n) isequal to or a multiple of n.

By dividing, at step S406, each type of configuration data item into ngroups such that each group of a given type relates to the same numberof PLPs it can be ensured that each of the frames in the frame structurehave a constant number of data items i.e., that the signaling capacityfor each frame remains constant. This has the advantage that itsimplifies scheduling.

Table 1 shows a pseudo-code for an algorithm for arranging theconfiguration data items in a similar manner to that described withreference to FIG. 4.

TABLE 1 //Q(n):Set initial configuration vector //P(n): number of PLPssignaled per frame of repetition length n //M: total number of PLPssignaled every frame //N: highest repetition length Rr(n) = Q(n)/n,n=1:N Rc(n) = ceil(Rr), n=1:N R(n) = (Rc(n) − Rr(n))*n, n=1:N for(i=1:N) for (j=i+1:N)  while ((R(i)>0) and (Q(j)>0)) Q(j) = Q(j) − 1Q(i) = Q(i) + 1 Rr(n) = Q(n)/n, n=1:N Rc(n) = ceil(Rr), n=1:N R(n) =(Rc(n) − Rr(n))*n, n=1:N end end end P(n)=Q(n)/n, n=1:N M=sum(P(n)),n=1:N

FIG. 5A is a flow diagram of processes performed by a transmissionapparatus when transmitting data according to the first exemplaryembodiment of the present invention.

Referring to FIG. 5A, at step S500, configuration data items, which maybe in the form of raw L1-Config signaling data, are generated. At stepS502, the transmission apparatus determines whether partitioning isenabled i.e., whether a transmission method in accordance with the firstexemplary transmission method is to be used. If the determination isthat such a transmission method is not to be used, the process proceedsto step S504 where the configuration data items are scheduled fortransmission in every frame, per methods of the related art. Theconfiguration data items are built into frames of the frame structure(cycle) by a frame builder of the transmission apparatus at step S506,and subsequently transmitted.

If the determination at step S502 is that a method according to thefirst exemplary transmission method is to be performed, the processproceeds to step S508, where the transmission apparatus determines arepetition length for each PLP to be transmitted. This may be performedaccording to a method as described above with reference to FIG. 4.

At step S510, the transmission apparatus determines a position withinthe cycle, and a repetition pattern, for each PLP to be transmitted. Forexample, it may be determined that the configuration data items for aPLP of repetition length n=2 are included in the first, third, and fifthframes of a cycle including six frames.

At Step S512 the transmission apparatus schedules the configuration dataitems for each PLP. At Step S514, the transmission apparatus arrangesthe configuration data items over a cycle, as illustrated in FIG. 2. Theconfiguration data items are built into frames of the cycle by a framebuilder of the transmission apparatus at step S516, and subsequentlytransmitted.

FIG. 5B is a flow diagram of processes performed by a receiver whenreceiving data according to the first exemplary transmission method.

Referring to FIG. 5B, the process starts at step S520 where the receiverapparatus decodes the L1 configurable signaling received in a firstframe of the first cycle of the superframe by which it receives data. Atstep S522, the constant data 202 of the frame is extracted.

At step S524 the receiver apparatus determines whether partitioning isenabled i.e., whether a transmission method in accordance with the firstexemplary transmission method is in use. If the determination is thatsuch a transmission method is not being used, the receiver apparatusdetermines that the configuration data items corresponding to each PLPare being transmitted in every frame of the cycle. Accordingly, thereceiver apparatus proceeds to step S526 and extracts configuration dataitems corresponding to one or more desired PLP i.e., the one or morePLPs corresponding to the service in relation to which the receiverapparatus is to receive data. The receiver apparatus proceeds to stepS528 in which the extracted configuration data items are used to decodethe data transmitted in the desired one or more PLPs. The receiverapparatus proceeds to step S526 where the configuration data items arescheduled for transmission in every frame, per methods of the relatedart. The configuration data items are built into frames of the cycle bya frame builder of the transmission apparatus at step S506, andsubsequently transmitted.

If the determination at step S524 is that partitioning is enabled, theprocess proceeds to step S530 where it is determined whether theconfiguration data items for the desired one or more PLPs are availablein the frame currently being processed. If the determination is that therelevant configuration data items are not available, the processproceeds to step S536, described below.

If the determination is that the relevant configuration data items areavailable, the receiver apparatus proceeds to step S532, where theconfiguration data items corresponding to the desired one or more PLPsare extracted. The extracted configuration data items are used to decodethe one or more desired PLPs, at step S534. The receiver apparatusproceeds to step S536, where it is determined whether all frames in thefirst cycle of the superframe have been received. If the determinationis that not all frames in the cycle have been received, the receiverapparatus decodes the L1 configurable data received in the next frame ofthe cycle, at step S538. The process returns to step S530 describedabove. Steps S530 to S538 may be repeated iteratively for all frames inthe cycle, or until all required configuration data items have beenextracted.

If the determination at step S536 is that all frames in the first cycleof the superframe have been received, the receiver apparatus stores therepetition pattern and position within the cycle of the configurationdata items required for the desired PLPs at step S540. This enables thereceiver apparatus to predict the position within the cycle at which itwill subsequently receive the configuration data items which, incombination with the fact that the same pattern of configuration dataitems is repeated in each cycle, may reduce the error rate of thereceiver. As indicated at step S542, the receiver apparatus need onlyextract configuration data items from the frames in which the desiredconfiguration data items are predicted to be positioned. This reducesthe processing load on the receiver apparatus, and may also enable thereceiver apparatus to save power by entering a low power mode, such as asleep mode, in parts of the cycle in which it is not required to receivedata.

Second Exemplary Transmission Method

In the above-described first exemplary transmission method, in caseswhere Q_(n) is not equal to n, or a multiple integer thereof, one ormore configuration data items are allocated repetition lengths shorterthan the desired repetition length. However, in some exemplaryembodiments, all configuration data items are allocated repetitionlengths equal to the desired repetition length, irrespective of whetherQ_(n) is equal to n, or a multiple integer thereof. This may be done byvarying the number of PLPs corresponding to a given repetition lengthfrom frame to frame, whilst maintaining constant the total number ofPLPs per frame, as is now described.

In this example, the frames are arranged in groups, or cycles, eachcontaining a number of frames equal to the total lowest commonmultiplier (L) of all the desired repetition lengths. The configurationdata items are included in data slots (referred to herein asconfiguration data slots) of the L1-Config signaling portion 110 of eachframe. Each configuration data item having a repetition length n isincluded L/n times in each cycle, with each cycle being repeated duringtransmission. If, having allocated each configuration data item L/ntimes, the number of PLPs allocated per frame is not constant across theframes of the cycle, one or more additional data items (such as dummydata items corresponding to dummy PLPs) can be added into additionaldata slots (referred to herein as additional data slots) so that thetotal number of PLPs (including the dummy PLPs), and the number ofcorresponding data slots (i.e., the sum of the configuration data slotsand the additional data slots), is constant across the frame cycle (andis typically constant across multiple frame cycles). Furthermore, thearrangement of configuration data slots (i.e., their locations withinframes and within the cycle of frames) may be the same in each cycle ofthe super-frame. As described above in relation to the first exemplarytransmission method, these features may reduce the error rate of thereceiver, and may enable the processing load on the receiver apparatusto be reduced, and/or enable the receiver apparatus to save power.

FIG. 6A is a schematic diagram of a first exemplary arrangement of dataconfiguration items in a sequence of frames according to a secondexemplary embodiment of the present invention.

Referring to FIG. 6A, the arrangement of data configuration items hasdifferent repetition lengths in a cycle 600 of frames. For example, fivePLPs have a desired repetition length n=1, seven PLPs have a desiredrepetition length of n=2, and ten PLPs have a desired repetition lengthn=3. In FIG. 6A, the data slots are shown by type (i.e., configurationdata slot and additional (dummy) data slot), and according to therepetition length n associated with the data included in the data slot.The PLP index of the PLP to which the data included in the data slotsrelates is also indicated.

Since the lowest common multiplier (L) of 1, 2, and 3 is 6, there aresix frames in the cycle 600. As can be seen from FIG. 6A, configurationdata items corresponding to twelve PLPs are included in each frame i.e.,there are twelve data slots in each frame. Whilst the number of dataslots corresponding to n=1 remains constant across each frame, thecorresponding number for each of n=2 and n=3 varies from frame to frame,whilst maintaining a constant total amount of data slots in each frame.Since, in order for each configuration data item to be repeated L/ntimes, configuration data items corresponding to only 11 PLPs need to beincluded in the sixth (final) frame of the cycle, an additional PLP maybe included in this frame.

FIG. 6B is a schematic diagram of a second exemplary arrangement of dataconfiguration items in a sequence of frames according to the firstexemplary embodiment of the present invention.

Referring to FIG. 6B, the configuration data items use the same initialset of desired repetition lengths. In this case, no dummy PLPs are used.Instead, configuration data items for one of the PLPs having a desiredrepetition length of n=3 are allocated an actual repetition length ofn=2.

This exemplary method provides many of the same advantages that areprovided by the first exemplary transmission method described above.More particularly, the overhead savings are the same. This isillustrated by the example of FIGS. 6A and 6B, in which, in each case,configuration data items corresponding to twelve PLPs are included ineach frame (including a dummy PLP in the sixth frame of FIG. 6A).

Furthermore, unlike the exemplary method of FIG. 4, it is not necessaryto allocate a repetition length lower than a desired repetition lengthto any configuration data item. This may simplify processing at thetransmitter and at the receiver of the transmission, since therepetition length may be set based on a service requirement of theservice provider. A network operator implementing this method does notneed to deviate from the requirements of the service provider.Furthermore, in some exemplary embodiments, the repetition length may bea fixed attribute of the corresponding PLP. Therefore, the presentmethod avoids any desirable alteration of this fixed attribute.

It should be noted that, whilst all configuration data items in thisexemplary method are transmitted at an average repetition length equalto the desired repetition length, the actual interval between frameswithin the cycle may differ from this number for some configuration dataitems. For example, in FIG. 6A, the configuration data itemscorresponding to PLP#4 for n=3 is first transmitted in frame 2 of thecycle, and again in frame 4, giving an interval of 2 frames. It willagain be transmitted in frame 2 of the subsequent cycle, giving aninterval of 4 frames since the previous transmission. However, theconfiguration data items repeated according to this pattern can bemaintained in the cluster of configuration data items having the desiredrepetition length, and it is not necessary to alter the attribute“repetition length” associated with the configuration data items. Thereceiver of the transmission can be arranged to anticipate the patternof configuration data items shown in FIG. 6A.

Additionally, since no configuration data items are transmitted at arepetition length which is less than the desired repetition length,additional space is made available in the frame, in the form ofadditional data items corresponding to the dummy PLPs, which may be usedfor transmitting “extra” data. To this end, a particular value may beassigned to an identifier in the frames including the additional dataitems, to identify the additional data items as such. On receipt of anidentifier having the assigned value the receiver may either discard theadditional data items, if they are “dummy” data items not being used totransmit extra data, or else process the additional data items if theyare being used to transmit extra data. The PLP identifier whose valuemay identify additional data items may be included as a configurationdata item in the L1-Config signaling portion 110 of the frame. In somearrangements, the receiver apparatus may not require a particular valueto identify the presence of the additional data items and may onlyrequire knowledge of the position within the cycle.

An exemplary method of providing an arrangement of configuration dataitems and additional data items according to the second exemplarytransmission method is now described with reference to FIG. 7. By way ofillustration, how the process of FIG. 7 would be implemented with thesame input parameters as FIG. 6A is also described below.

FIG. 7 is a flow diagram of a process for arranging configuration dataitems in different types according to the second exemplary embodiment ofthe present invention.

Referring to FIG. 7, at step S700, the input parameters are received,namely the number P_(n) of PLPs having repetition length n. In theexample of FIG. 6A, P₁=5, P₂=7, and P₃=10.

At step S702, the cycle length L is set to be equal to the least commonmultiple of all repetition lengths n in the cycle. Furthermore, aparameter N is set to be equal to the number of repetition lengthsgreater than one. In the example of FIG. 6A, N=2.

At step S704, the number D of additional data slots (e.g., the number ofdummy PLPs) per cycle is set at an initial value of zero.

Step S706 starts an iterative procedure, in which the value of D isiterated. At step S708, the values of parameters C_(n) and D_(n) are setat:

C _(n)=ceiling(P _(n) /n), and

D _(n)=(C _(n) ×n)−Pn.

At step S710, the value of D is incremented as:

D=D+(Dn×L/n).

Steps S708 to S710 are iterated to obtain a total value for D, summedover all values of n greater than 1. In the example of FIG. 6A, thefollowing values are obtained:

C ₂=4

C ₃=4

D ₂=1

D ₃=2

D=7.

This ends the iterative procedure. The process proceeds to step S712,where the number E of additional data slots (dummy PLPs) to beeliminated per frame of the cycle, and the number R of additional dataslots to remain in the cycle are determined as:

E=floor(D/L), and

R=mod(D,L).

In the example of FIG. 6A, the following values are obtained:

E=1, and

R=1.

At step S714, matrix A representing an initial candidate matrix isdefined having size L×N, with elements A_(1,n)=C_(n). The value ofA_(1,n) represents the number of data slots assigned to repetitionlength n of the 1^(th) frame of the candidate cycle.

At step S716, matrix B representing an initial distribution ofadditional data slots (dummy PLPs) amongst the frames of the cycle isdefined having size L×N, with elements B_(1,n), where:

-   -   B_(1,n)=D_(n) if 1 is equal to or an integer multiple of n; and    -   B_(1,n)=0 otherwise.

The value of B_(1,n) represents the number of additional data slotsassigned to repetition length n of the 1^(th) frame of the candidatecycle.

In the example of FIG. 6A, the following matrices are obtained:

${A = \begin{pmatrix}4 & 4 \\4 & 4 \\4 & 4 \\4 & 4 \\4 & 4 \\4 & 4\end{pmatrix}},\mspace{14mu} {{{and}\mspace{14mu} B} = {\begin{pmatrix}0 & 0 \\1 & 0 \\0 & 2 \\1 & 0 \\0 & 0 \\1 & 2\end{pmatrix}.}}$

The process proceeds to reduce the number of additional data slotsreduced from the candidate cycle. As described above, a number ofadditional data slots equal to E is removed from each frame of thecandidate cycle. This is done in two-step process, as is describedbelow.

At step S718, for each frame of the candidate matrix having a number ofadditional data items greater than or equal to E, a number of framesequal to E can simply be removed. In the example of FIG. 6A, this stepresults in the following matrices:

${A = \begin{pmatrix}4 & 4 \\3 & 4 \\4 & 3 \\3 & 4 \\4 & 4 \\3 & 4\end{pmatrix}},\mspace{14mu} {{{and}\mspace{14mu} B} = {\begin{pmatrix}0 & 0 \\0 & 0 \\0 & 1 \\0 & 0 \\0 & 0 \\0 & 2\end{pmatrix}.}}$

It should be noted that, although in this example additional data slotsare removed in ascending order of n (i.e., additional data slots removedfrom the n=2 column in preference to the n=3 column), in some cases adescending order, or any other order, of removal may be used.

As can be seen from the above exemplary matrices, it is not alwayspossible to directly remove the required number (E) of additional dataslots from all frames of the candidate frame cycle. In such cases, theprocess proceeds to step S720, where configuration data itemscorresponding to a number of configuration data slots equal to E areremoved from each frame from which it was not possible to remove Eadditional data slots, to one or more frames including additional dataslots. A corresponding number of additional data items is removed fromthe frames to which the configuration data items are moved.

In the example of FIG. 6A, this results in configuration data itemscorresponding to n=3 in the first frame of the sequence being moved tothe third frame of the sequence, and configuration data itemscorresponding to n=4 in the fifth frame of the sequence being moved tothe sixth frame of the sequence. The final matrices obtained in thisexample are as follows:

${A = \begin{pmatrix}4 & 3 \\3 & 4 \\4 & 3 \\3 & 4 \\4 & 3 \\3 & 4\end{pmatrix}},\mspace{14mu} {{{and}\mspace{14mu} B} = {\begin{pmatrix}0 & 0 \\0 & 0 \\0 & 0 \\0 & 0 \\0 & 0 \\0 & 1\end{pmatrix}.}}$

It can be seen that these matrices correspond to the arrangement shownin FIG. 6A. Whilst in this example, an additional (e.g., dummy) dataslot has been included in the final frame of the cycle, it should benoted that this is not always the case. Depending on the inputparameters, additional data slots may be included at other locationswithin the cycle.

After completion of the “swapping” procedure of step S720, the processends at step S722.

Cycles generated according to the above process can be used fortransmitting signaling data, by repeating the cycle during thetransmission of data.

It should be noted that the process described above with reference toFIG. 7 is by way of example only, and the various steps described mayvary. For example, in the above example, the value of the parameter Nwas set to be equal to the number of repetition lengths greater than 1.Since configuration data items having a repetition length of 1 arerepeated in each frame, no re-arrangement of same is required, and it isunnecessary to include the n=1 configuration data items in the aboveprocess. However, in some exemplary embodiments the value of N is set tobe equal to the number of repetition lengths including n=1, andsubsequent steps altered accordingly.

FIG. 8A is a flow diagram of processes performed by a transmissionapparatus when transmitting data according to the second exemplaryembodiment of the present invention.

Referring to FIG. 8A, steps S800 to S806 correspond, respectively, tosteps S500 to S506 described above in relation to FIG. 5A. However, inthe present example, the step corresponding to step S508 may be omitted.This is because, as described above in the second exemplary transmissionmethod, all configuration data items are assigned the correspondingdesired repetition length. Instead the process proceeds to step S810,where the transmission apparatus determines a position within the cycle,and a repetition pattern for each PLP to be transmitted. Step S810corresponds to step S510 described above.

Since, as described above, one or more additional data items may betransmitted in the second exemplary transmission method, at step S811the transmission apparatus determines the position and repetitionpattern for any such additional data items to be included in the cycle(cycle). Subsequent processing steps S812 to S816 correspond,respectively, to processing steps S512 to S516 described above inrelation to FIG. 5A.

FIG. 8B is a flow diagram of processes performed by a receiver whenreceiving data according to the second exemplary embodiment of thepresent invention.

Referring to FIG. 8B, steps S820 to S834 correspond, respectively, tosteps S520 to S534 as described above in relation to FIG. 5B.

However, different from the example of FIG. 5B, if it is determined atstep S830 that there are no configuration data items for the desired oneor more PLPs in the frame currently being processed, or after decodingthe desired one or more PLPs at step S834, the receiver apparatusproceeds to determining whether any additional data signaling,containing additional data items as described above, is available forthe currently processed claim. If such data signaling is available, theadditional data items included therein are extracted and used at stepS844. The process proceeds to step S836, which corresponds to step S536described above in relation to FIG. 5B. Subsequent steps S838 to S842correspond, respectively, to steps S538 to S542 described above inrelation to FIG. 5B.

If the determination at step S835 is that additional data signaling isnot available, the receiver apparatus proceeds directly to step S836,without performing step S844.

Third Exemplary Transmission Method

In the first and second exemplary transmission methods described above,all required configuration data items relating to an integral number ofPLPs may be included in each frame. This enables the data relating to agiven PLP carried in an L1-Config signaling portion 110 of a given frameto be self-decodable, as described below. In these methods, the size ofthe part of the L1-signaling portion which is allocated to configurationdata items of a given repetition length is determined by the number ofdata slots included in the relevant part, the data slots being occupiedby configuration data items corresponding to actual PLPs, or dummy datacorresponding to dummy PLPs.

However, in some exemplary embodiments of the present invention, dataconfiguration items may be divided across multiple frames of a sequence,with the bit size of each part of the frame that is allocated to aconfiguration data item having a given repetition length being kept at aconstant length for each of a sequence of frames. In such exemplaryembodiments, for each repetition length n, the sum total (T) of the bitsizes of the configuration data items having repetition length n isdetermined and divided by n. For each value of n, an amount of dataequal to T/n is allocated to each frame of the sequence. Where T is notdivisible by n, additional “dummy” data, for example one or more zeros,may be included in the relevant part one or more of the frames of thesequence, so that the part of the frame allocated to a given value of nremains constant across the sequence of frames.

FIG. 9 is a schematic diagram of a third exemplary arrangement of dataconfiguration items arranged in a frame sequence according to anexemplary embodiment of the present invention.

Referring to FIG. 9, only the L1-pre 208 and L1-Config 210 portions ofthree frames in a sequence are shown. However, it will be understoodthat the frames will typically additionally include some or all of theother portions described above in relation to FIG. 1.

In this example, the L1-Config signaling portion 210 includes an n=1part 210 a, an n=2 part 210 b, and an n=3 part 210 c, for transmittingconfiguration data items having the corresponding repetition length.

In this example, the total number of bits is assumed to be transmittedat repetition interval n=1 is assumed to be 200 bits, the number at n=2is assumed to be 280 bits, and the number at n=3 is assumed to be 400bits. The configuration data items for each value of n are divided up asdescribed above. For n=1, 200 bits of configuration data are transmittedin the n=1 part 210 a of each frame of the sequence. For n=2, 140 bitsof configuration data are transmitted in the n=2 part 210 b of eachframe of the sequence. For n=3, since 400 is not divisible by 3, 134bits of configuration data are included in the n=3 part 210 c of thefirst and second frames of the sequence, with 132 bits being included inthe n=3 part 210 c of the third frame in the sequence. In order toensure that the length of the n=3 part 210 c is constant across thesequence, two zeros 210 d are added at the end of the n=3 part of thethird frame in the sequence.

In order that, on receipt, the configuration data items can be correctlycollated, and any zeros removed, the constant part (containing theconstant data 302) of the L1-Config signaling portion of the frames ofthe sequence may include an indicator of the bit size of each of theabove-described parts 210 a, 210 b, and 210 c of the L1-Config signalingportion 210, as well as an indicator of the number of zeros (if any)included in the corresponding part. For example, the L1-Pre portion 208may include an indicator of the bit size of the constant portion of oneor more frames of the sequence.

In the above example, the zeros 210 d required for the n=3 data wereincluded at the end of the n=3 part 210 c of the third frame of thesequence. However, in some exemplary embodiments, the zeros (or otherdummy data) may be included at another predefined position in thesequence. By including the dummy data at a pre-defined position in asequence, processing on receipt of the transmitted data is simplified,since the receiver may simply discard the indicated number of zerosprior to processing the configuration data items.

The third exemplary transmission method allows an even greater saving intransmission overhead than the first and second exemplary transmissionmethods. This is because, in the present exemplary method, it is neithernecessary to allocate a repetition length greater than a desiredrepetition length (as is sometimes the case in the first exemplarytransmission method), nor is it necessary to add any additional dataitems corresponding to dummy PLPs (as is sometimes the case in thesecond exemplary transmission method).

It will be understood that the processes described above may beperformed by a transmission apparatus arranged to perform the processes.The transmission apparatus may include an input communications interfacefor receiving data streams, for example different digital videobroadcast channels, to be encoded into a frame structure, a processor,or set of processors, for performing processing steps in conjunction,where appropriate, with a data storage device, which may store data,such as the desired repetition lengths described above. The transmissionapparatus typically also includes an output communications interface forwirelessly transmitting data.

Similarly, the data transmitted by the transmission apparatus istypically received by one or more receiver apparatuses, each comprisingan input communications interface for wirelessly receiving the data, aprocessor, or set of processors, for performing, in conjunction with adata storage means where appropriate, processing of the received signalas is now described, and a video display, an audio transmitter and/or anoutput communications interface for outputting one or more selecteddecoded data streams.

On receipt of the data transmitted in a frame structure as describedabove, the receiver apparatus selects different PLPs to be received, thedifferent PLPs corresponding to different repetition lengths, forexample in response to a change of channel at the receiver apparatus.The receiver apparatus receives configuration data items correspondingto each selected PLP, and receives the corresponding PLP using thereceived corresponding configuration data items.

In the case that additional data corresponding to dummy PLPs areincluded in one or more frames of the frame structure, as may be thecase in the second exemplary transmission method described above, one ormore received frames may include a dummy PLP identifier, as describedabove. In this case, the receiver apparatus may parse the PLPidentifier, identify the additional data to which it relates and processthe additional data accordingly. In some cases, this may involve simplydiscarding the additional data. In other cases, as described above, theadditional data may include extra data, which the receiver apparatus maybe configured to receive and process, on receipt of an identifier valueindicating that such extra data is carried.

In the case of the third exemplary transmission method described above,the L1-Config signaling portion 210 may be divided into different parts210 a, 210 b, and 210 c, associated with different repetition lengths.At least one frame of the frame structure may include one or moreindicators of these lengths, which the receiver apparatus may bearranged to receive. On receipt of same, the receiver apparatus mayidentify the length of each of the parts 210 a, 210 b, and 210 c fromcorresponding indicators, and process the data in the different partsaccordingly.

Furthermore, as described above, one or more of the frames of the framestructure may include dummy values, such as a sequence of zeros, forexample at the end of the L1-Config signaling portion 210 of one or moreof the frames. In this case, one or more frames of the frame structuremay include an indicator of the number of zeros, so that they can bediscarded by the receiver apparatus.

Advantageously, in the first and second exemplary transmission methodsdescribed above, the data relating to a given PLP carried in anL1-Config signaling portion 210 of a given frame may be self-decodablei.e., contain all data necessary for decoding to commence, so thatdecoding in relation to a given PLP can be started as soon as thecorresponding configuration data items are received. Furthermore, once afirst instance of a given configuration data item has been received anddecoded, and since the configuration data items are ordered in apredictable way, based on the repetition length and/or PLP identifier asdescribed above, it may be unnecessary to decode subsequent instances ofthe same configuration data item.

FIG. 10 is a schematic diagram of data carried in a frame structurebeing decoded according to an exemplary embodiment of the presentinvention.

Referring to FIG. 10, a frame structure 200 comprises n frames in whichdifferent configuration data items P_(nm) are transmitted in each frameof the frame structure 200. The frame structure 200 is similar to theframe structure 300 of FIG. 3A. Assuming that each configuration dataitem is decoded correctly the first time an instance thereof isreceived, all configuration data items are decoded after N+1 frames,where N is the longest repetition length set for the transmission.

In order to reduce the burden on the processing resources of thereceiver apparatus, the first time an instance of a configuration dataitem is received and decoded, it may be stored in a data storage meansof the receiver apparatus with the stored instance being used toidentify and receive the corresponding PLP in subsequent frames.Subsequent, repeated, instances of the same configuration data itemwithin a superframe may be flagged by the receiver to be ignored by thedecoder and not decoded. In this exemplary embodiment, the storedinstance can be used to identify and receive the corresponding PLP insubsequent frames within the superfame, even those which follow theframes containing the repeated instances of the configuration data time.

In an alternative exemplary embodiment, each instance of any givenconfiguration data item transmitted in the frame structure 300 may bedecoded, to maintain simplicity of receiver operation and/or to reducedecoding errors.

In some exemplary embodiments, a receiver sets one or more valuesassociated with a soft decoder to one or more predefined values, toindicate that the configuration data item is already identified. Forexample, in exemplary embodiments in which a receiver generates LogLikelihood Ratios (LLRs) which are used as confidence factors in errorcorrection for data items to be decoded in a soft decoder, the LLRs forthe further, repeated, instances of the configuration data items may beset in the remainder of the superframe to +/−∞, to indicate that thesehave already been identified.

The identified configuration data items can be used to facilitate thedecoding of other data, such as other data carried in the L1-Configsignaling portion 210 and/or data contained in the L1-Dyn signalingportion 212. The fact that some bits in the received data are alreadyidentified (as indicated by the corresponding LLR having been set to+/−∞) increases the robustness of decoding, in terms of errorcorrection, of other bits in the received data.

Thus, when a given configuration data item has been received in a firstset of data (for example, data in a given frame) and decoded, thedecoded data can be used to facilitate in a decoding process of furthersets of data including the configuration data item. The fact that thebits of the configuration data item are identified improves therobustness of error correction in relation further data items includedin the further sets of data. These further data items may comprise dataitems carried in an L1-Config signaling portion 210 of a frame, oranother signaling portion, such as an L1-Dyn signaling portion 212,where the latter is coded together the L1-Config signaling portion 210.

When the frames are arranged into superframes, the configuration datamay vary from superframe to superframe. Accordingly, in some exemplaryembodiments, the receiver apparatus decodes at least the first instanceof each configuration data item in each superframe. However, since theconfiguration data items may change only infrequently, even betweendifferent superframes, in some exemplary embodiments the receiverapparatus does not decode the first instance of each configuration dataitem in each superframe. Instead, an indication may be included in, forexample, the L1-Dyn signaling portion 212 indicating that theconfiguration data items has changed, and the receiver apparatus decodesnew instances of configuration data in response to receiving thisindication. The indication may indicate one or more PLPs whosecorresponding configuration data items have changed. In this case, thereceiver apparatus may newly decode configuration data items for onlythe PLPs indicated.

As mentioned above, the exemplary methods of data transmission describedherein may be performed by a network operator in accordance with therequirements of a service provider.

FIG. 11 is a schematic diagram of a system according to an exemplaryembodiment of the present invention.

Referring to FIG. 11, the system includes a service provider 1100 and anetwork operator 1102. The service provider 1100 provides data relatingto one or more services 1104 to the network operator 1102, along withcontrol data 1106, which may include service requirements, such as adesired repetition length, or data from which a desired repetitionlength can be derived, such as a delay tolerance, and the like.

The network operator 1102 receives data from the service provider at anetwork gateway 1108. The network gateway 1108 additionally performsfunctions, such as mapping service requirements onto PLPs and theirservice attributes, such as repetition length.

The network gateway 1108 sends data relating to each of one or more PLPs1110, along with control data 1112 to a transmitter 1114. The controldata 1112 may include PLP attributes, such as a repetition length, andthe like.

The transmitter 1114 may perform functions, such as generation ofsignaling, frame building, and transmission of data.

The above exemplary embodiments are to be understood as illustrativeexamples of the invention. Further exemplary embodiments of the presentinvention are envisaged.

FIG. 12 is a table of data carried in an L1-Config signaling portion ofa frame according to an exemplary embodiment of the present invention.More specifically, FIG. 12 shows an alternative arrangement for theconstant data 302 and configuration data 304 included in the L1-Configsignaling portion 210 of a frame. The table of FIG. 12 is similar to thetable of FIG. 3B.

Referring to FIG. 12, the number of PLP configurations is limited to anumber lower than the number of PLPs in use, and the PLPs are classifiedaccording to the PLP configuration (“PLP mode”) used. In this way, theconfiguration data items common to a given PLP mode need not beseparately transmitted for each PLP of the given PLP mode. In thisexemplary embodiment, the different types of configuration data item maybe assigned on a PLP by PLP basis, as described above, or instead basedon the different PLP modes.

FIGS. 13A and 13B illustrate a table of data carried in an L1-Configsignaling portion of a frame according to an exemplary embodiment of thepresent invention.

Referring to FIGS. 13A and 13B, further alternative arrangements for theconstant data 302 and configuration data 304 included in the L1-Configsignaling portion 210 of a frame are illustrated.

The constant data in the example of FIG. 13A includes an “options flag”data item 1300, which indicates whether a given option with relatedsignaling in L1-CONF is used. If the given option is in use, thesignaling fields associated with the option are signaled in L1-CONF.Otherwise, they are not included and this enables overhead reductionwhen the given option is not used.

Table 2 provides an example of some different options that may beindicated by this field.

TABLE 2 Value Option Enabled xxxxxxx1 Sub-slicing xxxxxx1x Auxiliarystreams xxxxx1xx RESERVED_1 field inside the PLP loop xxxx1xxxRESERVED_2 field inside the PLP MODE loop xxx1xxxx RESERVED_3 fieldxx1xxxxx Partitioning of the PLP loop x1xxxxxx Reserved for future use1xxxxxxx Reserved for future use

It should be noted that the value xx1xxxxx indicates that a method oftransmission of data in accordance with an exemplary embodiment of thepresent invention is to be performed. This corresponds with data item1302 in FIG. 13A.

The “PARTITION_CYCLE_LENGTH” data item 1304 indicates the length, innumber of frames, of one cycle across which the signaling in the PLPloop of L1-CONF for all the PLPs in the current super-frame is complete.The signaling in the PLP loop of all PLPs in the current super-framewill generally be exactly the same. The signaling in the PLP loop ofL1-CONF for each PLP repeats at the same frame position every L framesin the current super-frame, where L is the value given byPARTITION_CYCLE_LENGTH. This value stays constant in at least thecurrent super-frame.

The “PARTITION_NUM_ADD_PLP” data item 1306 indicates the number ofadditional signaling blocks added in the PLP loop of the current framein order for each frame in the partition cycle to carry the signaling ofan integer number of PLPs for each cluster of PLPs, as described below.

The following fields appear only if the OPTIONS_FLAG field is equal to‘xx1xxxxx’:

-   -   The PLP_PARTITION_CLUSTER_ID data item 1308 indicates the        partition cluster of the signaling in the PLP loop associated        with the PLP identified by the PLP_ID. The partition cluster ID        is defined in Table 3.

TABLE 3 Value Description 00 The signaling in the PLP loop associatedwith the given PLP tolerates 0 frame delay. It shall be carried in everyframe of the current super-frame. 01 The signaling in the PLP loopassociated with the given PLP tolerates 1 frame delay. It may be carriedin every 2nd frame of the current super-frame. 10 The signaling in thePLP loop associated with the given PLP tolerates 2 frames delay. It maybe carried in every 3rd frame of the current super-frame. 11 Thesignaling in the PLP loop associated with the given PLP tolerates 3frames delay. It may be carried in every 4th frame of the currentsuper-frame.

The following fields appear in the loop over PARTITION_NUM_ADD_PLP:

RESERVED_(—)2 1310: This 32-bit field is reserved for future use. Thelength of this field (in this case, 32 bits) is equal to the sum of thelengths of the first six fields in the PLP loop (namely, PLP_ID,PLP_MODE_ID, PLP_ANCHOR_FLAG, PLP_IN_BAND_A_FLAG, PLP_GROUP_ID,FIRST_LF_IDX) in order to guarantee the same amount of signaling in thePLP loop associated with each PLP of PLP_PARTITION_CLUSTER_ID greaterthan “000”.

The following field appears only if the OPTIONS_FLAG field is equal to‘xxxxx1xx’:

-   -   RESERVED_(—)3 1312: This 8-bit field is reserved for future use.        The length of this field (i.e., 8) is equal to the lengths of        the field RESERVED_(—)1 in the PLP loop in order to guarantee        the same amount of signaling in the PLP loop associated with        each PLP of PLP_PARTITION_CLUSTER_ID greater than “000”.    -   PLP_PARTITION_CLUSTER_ID 1314: This 2-bit field indicates the        partition cluster of the signaling in the PLP loop associated        with the PLP identified by the PLP_ID. The partition cluster ID        is defined in Table 3 above.

The following description relates to an illustrative example of anexemplary embodiment of the present invention.

In order to reduce the overhead of L1-CONF, the signaling in the PLPloop of L1-CONF may be split into equal length partitions, so that eachframe carries only one partition of the total signaling in the PLP loop.The L1-CONF data is arranged in two parts, a first part which containsall the signaling data in L1-CONF except for the PLP loop signaling, anda second part which contains the signaling in the PLP loop. Only thesecond part, i.e., the signaling in the PLP loop, may be subject topartitioning. The first part will always appear in every frame of thesuper-frame.

A value of the field OPTIONS_FLAG equal to ‘xx1xxxxx’ indicates thatpartitioning of the PLP loop in L1-CONF is used.

When partitioning is used, each frame carries the signaling in the PLPloop associated with a number of PLPs equal to the valueNUM_PLP_PER_FRAME, which is less than or equal to the total number ofPLPs in the current super-frame NUM_PLP_PER_SUPER_FRAME. If partitioningis not used (i.e., OPTIONS_FLAG=‘xx0xxxxx’), the two fieldsNUM_PLP_PER_FRAME and NUM_PLP_PER_SUPER_FRAME have the same value.

The frame may also carry an additional signaling associated with anumber of dummy PLPs equal to PARTITION_NUM_ADD_PLP. The summationNUM_PLP_PER_FRAME+PARTITION_NUM_ADD_PLP shall be constant for everyframe in the super-frame, in order to guarantee the same amount ofL1-CONF signaling in every frame of the current super-frame.

When partitioning is used, every PLP in the super-frame is assigned apartition cluster indicated by the field PLP_PARTITION_CLUSTER_ID. Asdefined in Table 3 above, if PLP_PARTITION_CLUSTER_ID is equal to “000”,the signaling in the PLP loop associated with the given PLP shall betransmitted in every frame of the current super-frame, and hence doesnot tolerate any delay for its acquisition. The PLPs associated withLocal Service Insertion (PLP_TYPE=“011” or “100”) shall be assigned tothe first partition cluster PLP_PARTITION_CLUSTER_ID=“000”, as theyrequire additional signaling fields in the PLP loop compared to theother (i.e., non Local Service Insertion) PLPs and in order to guaranteethe same amount of signaling in every frame of the current super-frame.

If the value of PLP_PARTITION_CLUSTER_ID is equal to n (which isstrictly greater than 0), the signaling in the PLP loop associated withthe given PLP tolerates n frame delays, and hence may be transmittedevery (n+1)-th frame in the super-frame.

In order to ensure that every partition of L1-CONF is self-decodable(i.e., the receiver can decode and use the information as it arrives inevery frame of the current super-frame), an integer number of PLPs foreach partition cluster n (n>0) is guaranteed in every frame of thecurrent super-frame. If the actual number of PLPs which tolerate n framedelays for the acquisition of their associated signaling in the PLP loopis not equal to or a multiple integer of the partition cluster value n,some of these PLPs may be assigned or re-assigned to a lower partitioncluster value, and hence transmitted at a rate higher than the tolerablerate of every (n+1)-th frame in the super-frame, e.g., every n-th or(n−1)-th frame.

Alternatively, all PLPs which tolerate n frame delays may be assigned tothe same partition cluster n, and an additional signaling associatedwith a number of dummy PLPs equal to PARTITION_NUM_ADD_PLP may be addedto some partition clusters (n>0) in some frames in the currentsuper-frame. In the latter alternative, in order to maximize overheadreduction, only the minimum number of dummy PLPs should be considered ifrequired. This minimum number PARTITION_NUM_ADD_PLP can be determinedfrom all the numbers of actual PLPs and their corresponding partitioncluster values {n} over a period equal to the least common multiplier ofall partition cluster values {n}. The additional signaling associatedwith the number PARTITION_NUM_ADD_PLP of dummy PLPs may be used for somepurpose in the future.

If P_(actual)(n,l) denotes the number of actual PLPs in the partitioncluster n (n=0 to N−1) in the l-th frame of the current super-frame, andP_(dummy)(n,l) denotes the number of dummy PLPs associated with theadditional signaling in the PLP loop for the partition cluster n (n=0 toN−1) in the l-th frame of the current super-frame, the signaling in thePLP loop of every frame l shall be associated with a constant number ofPLPs, given by Q in Equation 1.

$\begin{matrix}{{{P_{actual}( {n,} )} + {\sum\limits_{n - 1}^{N - 1}\; ( {{P_{actual}( {n,} )} + {P_{dummy}( {n,} )}} )}} = Q} & {{Equation}\mspace{14mu} 1}\end{matrix}$

The signaling in the PLP loop of L1-CONF for a given PLP will repeat atthe same frame position every L frames in the current super-frame, whereL is the value of the field PARTITION_CYCLE_LENGTH. From one cycle toanother in the current super-frame, the signaling in the PLP loop of allPLPs in the current super-frame will be exactly the same. The partitioncycle helps the receiver anticipate the pattern of appearance in theframes of the signaling in the PLP loop associated with the desired PLP.It also helps the receiver know when the full L1-CONF signaling repeatsexactly in the current super-frame. The cycle length L is equal to theleast common multiplier of all partition cluster values {n}.

FIGS. 14A and 14B are schematic diagrams of an exemplary arrangement ofdata configuration items in a sequence of frames according to anexemplary embodiment of the present invention.

Referring to FIGS. 14A and 14B, a total number of actual PLPs in thesuper-frame is assumed to be equal to 5. All these 5 PLPs tolerate 1frame delay for the acquisition of their associated signaling in the PLPloop. Hence, ideally, all 5 PLPs should be assigned to the partitioncluster n=2. However, the number of PLPs (=5) is not a multiple of thepartition cluster value (n=2). In order to guarantee a self-decodablepartitioning with an equal amount of L1-CONF signaling in every frame,two equivalent alternatives may be considered:

The first alternative assigns 1 PLP to the partition cluster n=1, andall the remaining 4 PLPs to the partition cluster n=2. Thus, thesignaling of 1 PLP (PLP#1) will be repeated in every frame, whilst thesignaling of 4 PLPs will be split into two partitions of 2 PLPs. Thesignaling of the first 2 PLPs (e.g., PLP#2, PLP#3) will be repeated inodd frames (e.g., 1, 3, 5, 7) whilst the signaling of the other two PLPs(i.e., PLP#4 and PLP#5) will be repeated in even frames (e.g., 2, 4, 6,8). This is illustrated in FIG. 14A.

In this second alternative, all 5 PLPs are assigned to the partitioncluster n=2, an additional signaling associated with 1 dummy PLP isadded in the partition cluster n=2. The signaling of the first 3 PLPs(e.g., PLP#1, PLP#2, PLPL#3) will be repeated in odd frames (i.e., 1, 3,5, 7, and the like), whilst the signaling of the remaining two PLPs(i.e., PLP#4 and PLP#5) and the additional signaling associated with thedummy PLP will be repeated in even frames (e.g., 2, 4, 6, 8). This isillustrated in FIG. 14B.

If partitioning is not used, every frame will have a PLP loop with asignaling amount equal to 5×A, where A denotes the amount of signalingper PLP in the PLP loop. If partitioning is used, every frame will havea PLP loop with a signaling amount equal to 3×A, in both alternatives.The overhead reduction of the PLP loop is therefore equal to((5−3)×A)/(5×A)=40%. By accounting for the amount (=C) of signaling inthe constant part of L1-CONF (i.e., the part which is repeated in everyframe), the overall overhead reduction amounts to (2×A)/(C+5×A).

By way of example, exemplary embodiments of the present invention willnow be described in the context of a DVB-NGH system, in which, in oneexemplary embodiment, additional data for reception by DVB-NGH receiversis transmitted within FEF slots currently contained within the 2^(nd)generation terrestrial DVB-T2 system. In an alternative exemplaryembodiment, it is envisaged that the concepts herein described may beequally applied to a stand-alone DVB-NGH system that is not designed to‘piggy-back’ on such an existing DVB-T2 system. However, it will beunderstood that the examples described herein are by way of exampleonly, and that other exemplary embodiments may involve other wirelessbroadcast systems or unicast systems. Furthermore, it is envisaged thatalternative exemplary embodiments may be applied to other datatransmission systems, and thus are not limited to the use fortransmission of digital video signals.

In the context of examples of the present invention, the followingnon-limiting explanation of terms may be used to describe certainexemplary embodiments of the present invention. A physical frame/slotmay, in some examples, be considered to be a duration in time on a givenRF frequency where the signal corresponding to the target deliverysystem is present (transmitted). A FEF/additional slot, may, in someexamples, be considered to be a duration in time on a given RF frequencywhere the signal of the target delivery system is not present (nottransmitted). A physical super-frame may, in some examples, beconsidered to be an entity including a number of physical frames andFEFs. The physical configuration may, in some examples, only change atthe boundaries of two physical super-frames. A logical frame, may, insome examples, be considered to be a conceptual container with a fixednumber of Quadrature Amplitude Modulation (QAM) cells and a givenstructure for the carriage of data into the physical frames of thetarget delivery system. A logical super-frame, may, in some examples, beconsidered to be an entity that includes a number of logical frames. Thelogical signaling information may in some examples only change at theboundaries of two logical super-frames. A logical channel, may, in someexamples, be considered to be a flow of logical frames all ofsubstantially the same size and transmission properties for the carriageof data over the target delivery system. A logical channel group, may,in some examples, be considered to be a group of logical channels suchthat the physical frames which carry the logical frames of one logicalchannel in the group are separable in time from the physical frameswhich carry the logical frames of another logical channel in the group(i.e., zero overlap in time). A transport stream, may, in some examples,be considered to be a stream of data for an ensemble of services whichare delivered to the end users by the delivery system (e.g., DVB-NGH). Atransport stream may be structured by the delivery system into a numberof logical channels defined in accordance with the servicesrequirements.

FIG. 15 illustrates an overview of some elements of a DVB system adaptedaccording to an exemplary embodiment of the present invention.

Referring to FIG. 15, a DVB system 1200 includes a service provider 1202that provides a plurality of services #1˜#M 1204 and a control channel1206 that, in some examples, includes service requirement information.The service provider 1202 provides the services and control informationto a broadcasting network operator 1210 via, say, a network gateway1212. The network gateway 1212 may be arranged to provide mapping ofservice data and requirements onto PLPs and PLP service attributes, asshown. In one example, the mapping of service data may comprise mappingservices and/or service components.

The network gateway 1212 is operably coupled to a plurality oftransmitters 1220 and 1222 via a plurality of PLPs #1˜#N 1214 and acontrol PLP 1216 that may, in some examples, carry signaling, common PLPdata and/or auxiliary streams. As illustrated, each of the plurality oftransmitters 1220 and 1222 comprises at least a signal processor block1230 and 1232 configured to perform, inter-alia, signaling generation,frame building and transmission, as described below.

The transmitters 1220 and 1222 of the network operator 1210transmit/broadcast over the air the wireless signals, e.g., DVB-NGHsignals, to receiver communication units 1240 and 1242, such as DVB-NGHhandsets. The receiver communication units 1240 and 1242 compriserespective signal processor blocks 1250 and 1252 to process and decodethe received signals, as described below.

The DVB system 1200 comprises many other receivers and transmitters,which for clarity purposes are not shown.

In accordance with exemplary embodiments of the present invention, thesignal processor blocks 1230 and 1232 of the transmitters 1220 and 1222and the corresponding signal processor blocks 1250 and 1252 of thereceiver communication units 1240 and 1242 have been adapted to improvetransmission and reception of data streams in DVB systems.

FIG. 16 illustrates a block diagram of a receiver wireless communicationunit according to an exemplary embodiment of the invention.

Referring to FIG. 16, the receiver wireless communication unit 1600 is,in one exemplary embodiment, a DVB-NGH unit that contains an antenna1602 preferably coupled to a duplex filter or antenna switch 1604 thatprovides isolation between receive and transmit chains within thereceiver 1600.

The receiver chain, as known in the art, includes receiver front-endcircuitry 1606 (effectively providing reception, filtering andintermediate or base-band frequency conversion). The receiver front-endcircuitry 1606 is serially coupled to signal processor blocks 1250 and1252. An output from the signal processor blocks 1250 and 1252 isprovided to a suitable output device 1610, such as a screen or flatpanel display, for example to display DVB signals. The receiver chainalso includes a controller 1614 that maintains overall subscriber unitcontrol. The controller 1614 is also coupled to the receiver front-endcircuitry 1606 and the signal processor blocks 1250 and 1252 (generallyrealized by a digital signal processor (DSP) 1612 and 1652). Thecontroller 1614 is also coupled to a memory device 1616 that selectivelystores operating regimes, such as decoding/encoding functions,synchronization patterns, code sequences, and the like.

In accordance with examples of the invention, the memory device 1616stores configuration/profile information, by the receiver communicationunit 1600 and processed by signal processor blocks 1250 and 1252.Furthermore, a timer 1618 is operably coupled to the controller 1614 tocontrol the timing of operations (e.g., reception of time-dependentsignals) within the receiver communication unit 1600, particularly withregard to receiving DVB-NGH signals.

Some communication units may also comprise transmitter portions, whichfor completeness may comprise an input device 1620, such as a keypad,coupled in series through transmitter/modulation circuitry 1622 and apower amplifier 1624 to the antenna 1602. The transmitter/modulationcircuitry 1622 and the power amplifier 1624 may be operationallyresponsive to the controller 1614. Clearly, the various componentswithin the receiver communication unit 1600 can be realized in discreteor integrated component form, with an ultimate structure therefore beingmerely an application-specific or design selection.

In accordance with examples of the invention, receiver front-endcircuitry 1606, together with, and under the control and guidance of,the signal processor blocks 1250 and 1252, the memory device 1616, thetimer function 1618, and the controller 1614 have been adapted toreceive and process DVB-NGH of the receiver communication unit 1600.

A skilled artisan will appreciate that a wireless transmitter, such asnetwork operator transmitters 1220 and 1222 will comprise at leastsimilar functional blocks as the transmitter portion of communicationunit 300, albeit that the receiver signal processing functions blocks1250 and 1252 will be arranged to encode and generate DVB signals,frames, super-frames, and the like, rather than decode them.

FIG. 17 illustrates a logical frame structure according to an exemplaryembodiment of the present invention.

Referring to FIG. 17, a logical frame 1700 may be encoded and configuredby a signal processor in a network entity, such as signal processingblocks 1230 and 1232 in the network operator's transmitters 1220 and1222. Similarly, the logical frame 1700 may be received and decoded atthe receiving communication unit 1600 of FIG. 16, by signal processorblocks 1250 and 1252.

For simplicity purposes only, the hereinafter description may describe afeature in terms of an operation of a transmitter signal processingblocks 1230 and 1232, and it is envisaged that a skilled artisan wouldreadily appreciate that substantially the reverse operation will beperformed by the corresponding receiving signal processing blocks 1250and 1252. In such cases, only one side of the operation may bedescribed, and the reverse side operation is inherently implied.

The logical frame 1700 is defined as a data container including anL1-POST signaling field 1702, multiple PLPs, followed by, in someoptional examples, one or more auxiliary streams 1714, further followedby, in some optional examples, one or more dummy cells 1716, furtherfollowed by, in some optional examples, some PLPs of specific types 1717(not illustrated FIG. 17). Together, the signal processing logic mayarrange the one or more auxiliary streams 1714 and one or more dummycells 1716 to exactly fill the remaining capacity of the logical frame1700. In some examples, the auxiliary streams may be moved to thephysical frames, e.g., for the purpose of supporting power levelmessages, synchronization purposes or for exceptional cases. In someexamples, the total number of cells used for auxiliary streams and dummycells may be set to not exceed 50% of the total capacity of the logicalframe. In other examples, the signal processing logic may set the totalnumber of cells used for auxiliary streams and dummy cells to apredefined other percentage of the total capacity of the logical frame,or perhaps dynamically set (for example according to the prevailingoperating conditions).

Thus, each logical frame 1700 starts with L1-POST signaling 1702. Inthis example, the L1-POST signaling 1702 is followed by one or morecommon PLP(s) 1704, and thereafter, in order, Type 1 and Type 4 dataPLPs (as illustrated) 1706, 1712, Type 2 data PLPs 1708, auxiliarystreams 1714, dummy cells 1716 and Type 3 data PLPs 1710. In someexamples, it is envisaged that not each type of data PLP will besent/received in a logical frame, and thus not each of the data PLPs1706, 1708, 1710, and 1712 may be contained in every logical frame 1700.

In one example, the logical frame 1700 commences with those cellsemploying L1-POST signaling, whereas in other example implementationssome cells may not employ L1-POST signaling. Thereafter, the logicalframe 1700 can comprise any from the group comprising common PLPs 1704,different types of data PLPs (Type 1, 2, 3, 4) 1706, 1708, 1710, 1712,auxiliary stream 1714 and dummy cells 1716, whichever of these areapplicable.

In other examples, the signal processing logic may dynamically changethe locations of the PLPs themselves within the logical frame 1700, sayfrom logical frame to logical frame.

In some examples, a use of the aforementioned logical frame 1700 mayease mapping of logical frames to physical frames.

FIG. 18 illustrates a mechanism for mapping PLPs in a logical framestructure according to an exemplary embodiment of the present invention.More specifically, FIG. 18 illustrates a mapping arrangement 1800 formapping PLPs in a logical frame structure.

Referring to FIG. 18, the mapping arrangement 1800 illustrates acomplete logical frame comprising code portions providing L1-POSTsignaling 1802 and Common PLP portions 1804. The mapping arrangement1800 also illustrates one example of code portions providing Type-1 andType-4 data PLPs 1806-1808, Type-2 data PLPs 1810-1812, auxiliary datastreams 1814, Dummy cells 1816, and Type-3 data PLPs 1817. In oneexample, the Common PLP portions 1804, data Type-1, Type-3 and Type-4PLPs have exactly one sub-slice per logical frame, as illustrated. Asub-slice is defined as a ‘group of cells’ from a single PLP, whichbefore interleaving, is transmitted on cells with consecutive addressesin the logical frame. In this manner, the cells of a Type 1 PLP arealways adjacent to each other. The cells of a Type 2 PLP may be spreadin blocks across the logical frame. A Type-2 PLP may have multiplesub-slices in the logical frame, where the sub-slices are spread in thelogical frame for the sake of increased diversity when mapped onto theRF signal.

In one example, in a practical scenario, the data Type-2 PLPs 1810, 1812have more than one sub-slice per logical frame, as illustrated. In oneexample, the sub-slices of the PLPs, as well as the auxiliary streams1814 and dummy cells 1816 may be mapped by the signal processor into thecells of the logical frame as described below.

The logical frame 1800 commences with the L1-POST signaling 1802.

The common PLPs 1804 may be transmitted at the beginning of the logicalframe 1800, immediately after the L1-POST signaling portion 1802.

Data PLPs of Type-1 with some piggy-backed by Data PLPs of Type-4 1806,1808 may be transmitted after the common PLPs 504.

Data PLPs of Type-2 1810, 1812 are transmitted after the data PLPs ofType-1 and Type-4 1806, 1808.

The auxiliary stream or streams 1814, if any, follow the Data Type-21810, 1812, and this can be followed by dummy cells 1816.

Data Type-3 PLP 1817, if any, is transmitted after the dummy cells 1816.

Again, together, the L1-POST signaling, PLPs, auxiliary streams anddummy cells are configured by the signal processor to exactly fill thecapacity of the logical frame 1800.

FIG. 19 illustrates a mechanism for mapping PLPs in a logical framestructure with identified frame types according to an exemplaryembodiment of the present invention.

Referring to FIG. 19, a mapping arrangement 1900 is illustrated formapping PLPs in a logical frame structure 1900 with identified frametypes. In the logical frame structure 1900, the cells of the L1-POSTsignaling are mapped by the signal processor into the first part of thelogical frame 1900. The cells of the Common PLPs 1902 may be mapped bythe signal processor into the second part of the logical frame 1900(e.g., they shall have lower cell addresses than for the other types ofPLP). The cells of any one Common PLP 1902 for a particular logicalframe 1900 may be mapped sequentially into a single contiguous range ofcell addresses 1910 of the logical frame 1900, in order of increasingaddress. The cells of a Type-1 PLP 1904, together with a piggy-backingType-4 PLP, if any, for a particular logical frame 1900 may also bemapped sequentially into a single contiguous range of cell addresses1910 of the logical frame 1900, by the signal processor, in order ofincreasing address. The cells of all the Type-1 and Type-4 PLPs 1904 mayfollow after the common PLPs 1902, if any, and before any Type-2 PLPs1906, auxiliary streams, dummy cells, or Type-3 PLPs, if any. In oneexample, the cells of a Type-2 PLP 1906 for a particular logical frame1900 may also be divided into a number of sub-slices, each sub-sliceincluded in a sub-slice interval 1908 for all Type-2 PLPs, asillustrated in FIG. 19. Each sub-slice 1908 of a PLP may be mapped bythe signal processor to a contiguous range of cell addresses 1910 of thelogical frame 1900, in order of increasing address. In one example, thecells of the first sub-slice 1914 of the first Type-2 PLP may beconfigured by the signal processor to start after the last cell of thelast Type-1 PLP 1904. These shall be followed by the cells of the firstsub-slice of the other Type-2 PLPs, followed by the cells 1918 of thesecond sub-slice for each PLP in turn, with the PLPs taken in the sameorder. This arrangement configured by the signal processor continuesuntil the last sub-slice of the last PLP has been mapped.

FIG. 20 illustrates a mechanism for incorporating an input streamsynchronization field in a logical frame structure according to anexemplary embodiment of the present invention. More specifically, FIG.20 illustrates a logical frame structure 2000 incorporating an InputStream SYnchronization (ISSY) field 2020.

Referring to FIG. 20, the logical frame structure 2000 comprises anL1-POST signaling field followed by the common PLPs 2002, followed byType-1 and Type-4 PLPs 2004, Type-2 PLPs 2006, auxiliary streams, dummycells, and Type-3 PLPs. A first Type-1 PLP in the logical framestructure 2000 comprises a plurality of BaseBand (BB) frames 2008. Thebaseband frames 2008 comprise a BB header field 2010 followed by datafor one PLP 2012, in-band signaling 2014 and additional padding 2016. Inthis example, the in-band signaling 2014 of at least one (e.g., thefirst) baseband frame comprises a signaling portion 2018 and the ISSYfield 2020. Thereafter, the subsequent baseband frames 2008 alsocomprise a baseband header field 2010 followed by data for one PLP 2012,in-band signaling 2014 (that does not contain an ISSY field 2020) andadditional padding 716.

In one example, the illustrated 3-byte ISSY field 2020 may carry thevalue of a counter clocked at, say, a modulator clock rate 1/T and canbe used by the receiver to regenerate the correct timing of theregenerated output stream. In one example, an ISSY field 2020 may betransmitted in the in-band signaling Type-B of at least one (e.g., thefirst) baseband frame of a given PLP in one logical frame 2000. In theevent of multiple associated PLPs in one logical frame 2000, an ISSYfield 2020 may be transmitted in the in-band signaling Type-B of atleast one (the first) baseband frame of at least one PLP, say the anchorPLP. In this manner, the logical frame structure 2000 incorporating aninput stream synchronization ISSY field 2020 may reduce any signalingoverhead, primarily due to the fact that all the data packets for themultiple associated PLPs in one logical frame experience similar delayand/or jitter.

FIG. 21 illustrates a logical super-frame structure according to anexemplary embodiment of the present invention.

Referring to FIG. 21, the number of logical frames #m 2110 and 2120(with only two shown in the simplified example for clarity purposesonly) in a logical super-frame 2100 may be a configurable parameter thatis signaled in the configurable signaling (L1-CONF), as configured bythe signal processor. In this example, the maximum number of logicalframes 2110 and 2120 in a given logical super-frame 2100 is equal to‘255’.

Typically, an L1-Pre may be transmitted and carry a minimum amount ofinformation about the frame format, thereby resulting in a smalloverhead. With L1-Pre, the NGH receiver knows the start/end of the NGHphysical slot, as well as when the next NGH logical frame is scheduledand its duration.

In one example, all parameters defined in L1-PRE to signal the L1-POSTsignaling format 2102 and 2112, and the configurable part (as comparedto the other component of L1-dynamic) of L1-POST (L1-CONF), may bechanged by the signal processor only at the border of two logicalsuper-frames 2100. It is worth clarifying that the concepts of L1-Pre,L1-configurable and L1-dynamic are only previously known in the contextof physical frames.

Thus, in one example, if the receiver receives only the in-band Type-A,a counter (such as a counter contained within timer 1618 of FIG. 16) maybe configured to indicate the next logical super-frame 800 with changesin L1 configurable parameters. In this manner, the receiver may be ableto check the new L1-CONF parameters from the L1-POST 2102 and 2112 inthe first logical frame of the announced logical super-frame 2100, wherethe change applies.

In some examples, a data PLP 2104 and 2114 does not have to be mappedinto every logical frame. In such a situation, the data PLP 2104 and2114 may be configured by the signal processor to jump over multiplelogical frames 2110 and 2120 in the logical super-frame 2100. This frameinterval (hump) may be determined by the PLP_LF_INTERVAL parameter, andthe first logical frame where the data PLP appears is determined byPLP_FIRST_LF_IDX parameter. The parameters PLP_LF_INTERVAL andPLP_FIRST_LF_IDX may be signaled in the configurable signaling L1-CONF.In order to have unique mapping of the data PLPs 2104 and 2114 betweenlogical super-frames 2100, the number of logical frames 2110 and 2120per logical super-frame 2100 may be configured by the signal processorto be divisible by a factor of ‘PLP_LF_INTERVAL’ for every data PLP 2104and 2114. In one example, the data PLPs 2104 and 2114 may be mapped bythe signal processor to the logical frames 2110, 2120 for which:(LF_IDX−PLP_FIRST_LF_IDX) mod PLP_LF_INTERVAL=0.

In one example, the number of logical frames in a logical super-framemay be chosen by the signal processor so that for every data PLP thereis an integer number of Forward Error Correction (FEC) block per logicalsuper-frame.

One example of L1-CONF may be:

-   -   PLP_ANCHOR_FLAG: In one example, this may be a 1-bit field that        indicates if the PLP identified by PLP_ID is an anchor PLP for        all its associated PLPs. For example, the value ‘1’ may indicate        an anchor PLP.    -   PLP_IN-BAND_A_FLAG: In one example, this may be a 1-bit field        indicates whether the current PLP carries in-band type A        signaling information. In one example, when this field is set to        the value ‘1’, the associated PLP carries in-band type A        signaling information. In one example, when this field is set to        the value ‘0’, in-band type A signaling information may not be        carried. If the value of PLP_ANCHOR_FLAG is set to ‘0’ (i.e.,        not an anchor PLP), the value of PLP_IN-BAND_A_FLAG may be set        to ‘0’.    -   PLP_TYPE: In one example, this may be a 3-bit field that may        indicate the type of the associated PLP_MODE. PLP_TYPE may be        signaled according to Table 4 below:

TABLE 4 Signaling format for the PLP_TYPE field. Value Type 000 CommonPLP 001 Data PLP Type 1 010 Data PLP Type 2 011 Data PLP Type 3 100 DataPLP Type 4 101 to 111 May be reserved for future use

-   -   PLP_ISSY_MODE: In one example, this may be a 2-bit field that        may indicate whether an ISSY-BF, ISSY-LF, or ISSY-UP mode is        used for the given PLP. The mode may be signaled according to        Table 5 below:

TABLE 5 Signaling format for the PLP_ISSY_MODE Value PLP mode 00 ISSY-BFmode 01 ISSY-LF mode 10 ISSY-UP mode 11 Reserved for future use

-   -   IN-BAND TYPE A    -   L1_POST_DELTA: In one example, this may be a 24-bit field that        may indicate the gap, in QAM cells, between the last cell        carrying L1-PRE signaling and the first cell of the first        logical frame starting in the current NGH frame. The value (HEX)        FFFFFF means that no new logical frame starts in the current NGH        frame.    -   LC_NEXT_FRAME_DELTA: In one example, this may be a 24-bit field        that may indicate the relative timing in T periods between the        current NGH frame and the next NGH frame that carries the        current logical channel.    -   PLP_RF_IDX_NEXT: For LC type D PLPs, in one example, this may be        a 3-bit field that may indicate the RF frequency of the current        PLP in the one after the next logical frame (n+2) where the PLP        occurs. The value may be interpreted according to the        LC_CURRENT_FRAME_RF_IDX of L1-PRE. For LC types A, B and C this        field may be reserved for future use.

FIG. 22 illustrates a logical channel structure comprising a sequence oflogical frames according to an exemplary embodiment of the presentinvention.

Referring to FIG. 22, a Logical Channel (LC) 2200 is defined as asequence of logical frames 2210 and 2212, each starting with L1-POSTsignaling 2202. In this example, the LC 2200 may be transmitted over apattern of ‘1’ to ‘N’ RF frequencies available in the network (with onlythree RF frequencies, RF1 2214, RF2 2216, RF3 2218 shown in thesimplified example for clarity purposes only). There may be a number Mof logical channels in one transport stream in the network.

Four types of logical channels are defined, namely, Type A, Type B, TypeC, and Type D that dictate mapping on to physical frames.

Thus, the logical channels can be arranged in groups, where it may (andsometimes always) be possible to receive all logical channel members ofa group with a single receive tuner, thereby allowing, say, receiver1600 to decode both logical channels.

Each group of logical channels is identified by a unique identifierLC_GROUP_ID.

In the illustrated example, the first Logical Channels (LC1) 2224, 2226,2228 and the second Logical Channels (LC2) 2230 and 2232 belong to thesame group, with LC1 2224, 2226, 2228 being configured as Type-C and LC2being configured as Type-A. The signal processor (in the transmit side)has constructed the logical channels with zero overlap in the timedomain.

FIG. 23 illustrates a logical channel Type-A structure comprising asequence of logical frames according to an exemplary embodiment of thepresent invention.

Referring to FIG. 23, an LC Type-A 2300 is configured by the signalprocessor to correspond to a case whereby each LF 2304 and 2306 of thelogical channel 2308 is mapped to one physical DVB-NGH frame 2310 on asingle RF channel 2302. Thus, in this manner, each physical DVB-NGHframe 2310 may be configured by the signal processor to contain cellsfrom only one logical frame 2304 and 2306 of the logical channel 2308.All physical frames that carry the logical frames 2304 and 2306 of agiven logical channel 2308 may be configured by the signal processor tohave the same length and the same L1-PRE signaling, except for examplethe frame index number (FRAME_IDX). In this manner, a 1:1 mapping oflogical frames to physical DVB-NGH frames can be achieved. The FEF 2312in the logical channel Type-A structure 2300 is an FEF of DVB-NGH andnot that of a DVB-T2 system.

Thus, in the illustrated example in FIG. 23, the LC 2308 of Type A ismapped to all cells of one LF 2304, which are carried in one physicalframe 2310, with the same physical frame 2310 being subsequently used tocarry the all cells of a second LF 2306 (from the same LC 2308 of TypeA).

For a logical channel Type-A, each logical frame is synchronized to onephysical frame in such a way that the first logical frame cell is mappedto the first physical frame data cell (lowest data cell address in thephysical frame) and the last logical frame cell is mapped to the lastphysical frame data cell (highest data cell address in the physicalframe). All logical frames are carried on a single RF frequency. Asequence of logical frames is therefore carried on a sequence ofphysical frames, with exactly one logical frame per physical framecarrying the given logical channel.

FIG. 24 illustrates a logical channel Type-B structure comprising asequence of logical frames according to an exemplary embodiment of thepresent invention.

Referring to FIG. 24, a logical channel Type-B 2400 is configured by thesignal processor to correspond to a case whereby each logical frame 2404and 2406 of the LC 2408 is mapped to multiple (N) DVB-NGH physicalframes 2402 and 2403 on a single RF channel 2410. In this example, thesignal processor has arranged for the physical frames to be of equallength. In this example, the signal processor has arranged for eachlogical frame to therefore map in parts onto multiple DVB-NGH physicalframes 2402 and 2403 on the same RF channel 2410, and hence each DVB-NGHphysical frame 2402 and 2403 may contain cells from multiple logicalframes 2404 and 2406 of the same logical channel 2408. In this example,the signal processor may configure all DVB-NGH physical frames to havethe same L1-PRE signaling 2412, which in one example may preclude thefields L1_POST_DELTA, and FRAME_IDX. Thus, in this example, one logicalframe may be time-multiplexed into two or more DVB-NGH physical frames.

For a logical channel Type-B, the stream of logical frame cells ismapped to the stream of physical frame data cells in such a way that thefirst cell of a logical frame is mapped to any of the data cells in aphysical frame. A cell of the logical frame stream that appears P cellslater than the mentioned first cell shall be mapped to a physical framestream cell that appears P cells later than the physical frame cell towhich the mentioned first logical frame was mapped. If the logical frameis not completed in the current physical frame it continues on thefollowing physical frame of the same logical channel from the first datacell of that physical frame. If the logical frame is completed in thecurrent physical frame the following logical frame of the same logicalchannel starts immediately after without any gap. All logical frames arecarried on a single RF frequency. Logical channel type B is a supersetof logical channel type A, which it includes as a special case.

FIG. 25 illustrates a logical channel Type-C structure comprising asequence of logical frames according to an exemplary embodiment of thepresent invention.

Referring to FIG. 25, a logical channel Type-C 2500 is configured by thesignal processor to correspond to a case whereby each logical frame of afirst logical channel 2512, 2514, 2516 and each logical frame of asecond logical channel 2518, 2520, and 2522 is mapped to multiple (N)physical DVB-NGH frames on multiple (M) RF channels RF1 2502, RF2 2504,and RF3 2506. In one example, the physical DVB-NGH frames from differentRF channels 2502, 2504, and 2506 may be separated by the signalprocessor in time to allow for reception with one single tuner (notshown). In one illustrated example, the physical DVB-NGH frames fromdifferent RF channels 2502, 2504, and 2506 may be configured by thesignal processor to be of different lengths.

In this example, each logical frame may therefore map in parts ontomultiple DVB-NGH physical frames on multiple (M) RF channels 2502, 2504,and 2506, and hence each physical DVB-NGH frame may contain cells frommultiple logical frames of the same logical channel.

In one example, all physical DVB-NGH frames may be configured by thesignal processor to have the same L1-PRE signaling 2510, which in oneexample may preclude the fields L1 POST_DELTA,LC_CURRENT_FRAME_POSITION, LC_CURRENT_FRAME_RF_IDX,LC_NEXT_FRAME_RF_IDX, and FRAME_IDX.

Thus, in the illustrated example, an LC1 and an LC2 are both of Type-C,and may be members of the same LC group. In the illustrated example, LC1is first sent in the first RF channel, RF1 2502, then the second RFchannel, RF2 2504, and then the first RF channel, RF1 2502 again. Thisprocess is repeated.

In the illustrated example, LC2 is first sent in the third RF channel,RF3 2506, then the second RF channel, RF2 2504, and then the third RFchannel, RF3 2506 again. This process is also repeated. In this manner,each logical channel has its own ‘cycle and its own frequency set thatis used. In FIG. 25, the (transmit) signal processor leaves a time gapfor the receiver to switch between different RF channels, hence usingboth time and frequency multiplexing of signals.

For a logical channel Type-C, the logical frames are mapped in the sameway as for logical channels type B, except that the physical frames usedto carry the logical channel may be transmitted on different RFfrequencies and that successive physical frames using different RFfrequencies need to be time separated. Logical channel type C is asuperset of logical channel type B, which it includes as a special case.

FIG. 26 illustrates a logical channel Type-D structure comprising asequence of logical frames according to an exemplary embodiment of thepresent invention.

Referring to FIG. 26, a logical channel Type-D 2600 is configured by thesignal processor to correspond to a case whereby each logical frame ofthe logical channel is mapped one-to-one to multiple (N) physicalDVB-NGH frames (with only three physical DVB-NGH frames at a time 2608and 2610 shown in the simplified example for clarity purposes only) onmultiple (N) RF frequencies (with only three RF frequencies 2602, 2604,and 2606 shown in the simplified example for clarity purposes only). Thephysical DVB-NGH frames 2608 and 2610 may be configured by the signalprocessor to be of equal-length and time-synchronized. In this manner,the time synchronization may ensure that the preamble P1 symbol of eachof the physical DVB-NGH frames 2608 and 2610 carries the logicalchannel, using the same frame index and shall start at the same time. Inone example, physical DVB-NGH frame 2608 and 2610 may be configured bythe signal processor to contain cells from only one logical frame,whereby in one example each logical frame may be configured to beavailable on all simultaneous physical frames. In this example,therefore, one logical frame is mapped on to a set of physical DVB-NGHframes time synchronized, each mapped on to one RF channel.

A logical frame of a logical channel Type-D is arranged in a singlelogical frame matrix, with LC_NUM_RF columns and LC_LF_SIZE/LC_NUM_RFrows. The parameters LC_NUM_RF and LC_LF_SIZE are provided in L1-PREsignaling, and may represent respectively the number of RF frequenciesand the size in cells of one logical frame for the given logicalchannel. Each logical frame of a logical channel Type-D is synchronizedto one set of parallel physical frames, with one physical frame per RFfrequency, in such a way that each column of the logical frame is mappedto the cells of its corresponding RF frequency with the first cell ofthe logical frame mapped to the first physical frame data cell (lowestdata cell address in the physical frame) and the last logical frame cellmapped to the last physical frame data cell (highest data cell addressin the physical frame). A sequence of logical frames is thereforecarried in a sequence of sets of physical frames, with exactly onelogical frame per each set of physical frames, and one physical frameper RF frequency. The set of RF frequencies that are used to carry agiven logical Type-D is configurable.

FIGS. 27A and 27B illustrate a table of an L1-Pre signaling field in alogical channel structure according to an exemplary embodiment of thepresent invention.

Referring to FIGS. 27A and 27B, all time synchronized physical framesmay be configured to have the same L1-PRE signaling, except for theaforementioned fields. A number of new fields contained within theexample table of an L1-Pre signaling field in a logical channelstructure 2700 are introduced by the signal processor:

-   -   L1_POST_DELTA: In one example, this may be a 24-bit field that        indicates a gap, in QAM cells, between the last cell carrying        L1-PRE signaling and the first cell of the first logical frame        starting in the current NGH frame. The value (HEX) FFFFFF may be        configured to mean that no new logical frame starts in the        current NGH frame.    -   LC_GROUP_ID: In one example, this may be a 2-bit field that        provides an identifier (ID) of the group of logical channels the        current logical channel (carried in the current NGH frame)        belongs to. In some examples, it may be possible to receive with        a single tuner all the logical channels member of a logical        channel group.    -   LC_NUM: In one example, this may be a 3-bit field that indicates        a total number of logical channels member(s) of the current LC        group (i.e., which ID is given by LC_GROUP_ID) which may be        carried in the current NGH frame. In one example, the minimum        value of LC_NUM may be set to equal ‘1’.    -   LC_ID: In one example, this may be a 3-bit field that indicates        an identifier (ID) of the current logical channel carried in the        current DVB-NGH frame. In one example, the value of LC_ID may be        configured to range from ‘0’ to ‘LC_NUM−1’.    -   LC_TYPE: In one example, this may be a 3-bit field indicates the        type of the current logical channel carried in the current NGH        frame.    -   LC_ NUM_RF: In one example, this may be a 3-bit field indicates        N_(RF), the number of RF channels used by the current logical        channel. The frequencies may be listed within the configurable        parameters of the L1-POST signaling.    -   LC_CURRENT_FRAME_RF_POS: In one example, this may be a 3-bit        field that indicates the position of the RF channel of the        current DVB-NGH frame in the cycle of RF channels used by the        current logical channel.    -   LC_CURRENT_FRAME_RF_IDX: In one example, this may be a 3-bit        field that indicates an index of the RF channel of the current        DVB-NGH frame used to carry the current logical channel.    -   LC_NEXT_FRAME_RF_IDX: In one example, this may be a 3-bit field        that indicates an index of the RF channel of the next DVB-NGH        frame used to carry the current logical channel.    -   LC_NEXT_FRAME_DELTA: In one example, this may be a 24-bit field        that indicates a relative timing in T periods between the        current NGH frame and the next NGH frame that carries the        current logical channel.

FIG. 28 illustrates a table of an L1-Pre signaling format for logicalchannel types according to an exemplary embodiment of the presentinvention.

Referring to FIG. 28, the logical channel types include LC Types 2800and LC_TYPE-A 2802, LC_TYPE-B 2804, LC_TYPE-C 2806, LC_TYPE-D 2808, andother available bit patterns that may be reserved for future use 2810are described below.

LC_TYPE-A 2802 may be a 3-bit field that indicates a logical channelthat is carried on a single RF channel. Each logical frame of thelogical channel is carried in one NGH frame. This is the case whenbundling is not used either in the time or frequency domains.

LC_TYPE-B 2804 may be a 3-bit field that indicates a logical channelthat is carried on a single RF channel. Each logical frame of thelogical channel may be carried in one or more NGH frames. This is thecase when bundling is used in the time domain (e.g., across the NGHframes on a single RF channel).

LC_TYPE-C 2806 may be a 3-bit field that indicates a logical channel maybe carried on one or more RF channels. Each logical frame of the logicalchannel may be carried in one or more NGH frames on one or more RFchannels. This is the case when bundling is used in the time andfrequency domains (i.e., across the NGH frames in the time domain onmultiple RF channels).

LC_TYPE-D 2808 may be a 3-bit field that indicates a logical channel maybe carried on one or more RF channels. Each logical frame of the logicalchannel may be carried in one set of parallel and time-synchronized NGHframes, with one NGH frame per RF frequency. This is the case when TFSis used (i.e., across a set of time-synchronized NGH frames, each on adifferent RF frequency). As illustrated, other available bit patternsmay be reserved for future use 2810.

FIG. 29 illustrates a flowchart of an initial scanning operation of areceiver receiving a logical channel according to an exemplaryembodiment of the present invention.

Referring to FIG. 29, an initial scanning operation 2900 of a receiveris provided. The signal processor, for example, signal processor 1250and 1252 of FIG. 16, determines at step 2904 whether all RF frequencieshave been scanned. If it is determined that all RF frequencies have notbeen scanned at step 2904, the signal processor 1250 and 1252 selects anRF frequency at step 2906. The signal processor 1250 and 1252 detects P1at step 2908, and determines whether the selected RF frequency is asupported signal at step 2910. If it is determined that the signal issupported, the signal processor 1250 and 1252 decodes L1-PRE at step2912. Otherwise, if the signal is not supported, the signal processorreturns to step 2908 and detects P1. Once L1-PRE has been decoded atstep 2912, the signal processor 1250 and 1252 determines whether LC IDhas already been scanned at step 2914. If it is determined that the LCID has already been scanned at step 2914, the signal processor 1250 and1252 moves to an RF different than the next RF indicated for the currentLC at step 2916, before returning to step 2912 to decode L1-PRE. Incontrast, if it is determined that the LC ID has not already beenscanned at step 2914, the signal processor 1250 and 1252 determineswhether L1-POST is available at step 2918.

If it is determined that L1-POST is not available at step 2918, thesignal processor 1250 and 1252 moves to the next RF of the current LC in2920, and returns to step 2912 to decode L1-PRE. In contrast, if it isdetermined that L1-POST is available at step 2918, the signal processor1250 and 1252 decodes L1-POST at step 2922, and extracts L1-CONF at step2924 before returning to step 2904 to determine if all RF frequencieshave been scanned. If it is determined that all RF frequencies have beenscanned at step 2904, the signal processor 1250 and 1252 ends theinitial scanning operation at step 2902.

Thus, in this manner during the initial scanning phase, the receiver isable to acquire the frequency hopping pattern used by each LC (the RFchannels used by each LC, and the pattern and cycle of repetition, theorder, indexes, center frequencies, and the like, at step 2924).

FIG. 30 illustrates a flowchart of a normal continuous receptionoperation of a receiver receiving a logical channel according to anexemplary embodiment of the present invention.

Referring to FIG. 30, a normal continuous reception operation 3000 of areceiver is provided. The signal processor, say signal processor 1250and 1252 of FIG. 16, determines, at step 3002, the desired LC and PLP.The signal processor 1250 and 1252 selects a first RF frequency at step3004, before detecting P1 at step 3006. The signal processor 1250 and1252 determines whether the signal is supported at step 3008. If it isdetermined that the signal is not supported at step 3008, the signalprocessor 1250 and 1252 returns to step 3006 and detects P1 again. Incontrast, if it is determined that the signal is supported at step 3008,the signal processor 1250 and 1252 decodes L1-PRE field at step 3010. Atstep 3012, the signal processor 1250 and 1252 determines whether thecurrent LC is the desired LC. If it is determined that the current LC isnot the desired LC at step 3012, the signal processor 1250 and 1252derive and logs all the next RF frequencies of the current non-desiredLC at step 3016, and moves to an RF frequency different than any of thenext RF frequencies of the current non-desired LC or any previousnon-desired LC at step 3014, before returning to step 3010 to decodeL1-PRE.

In contrast, if it is determined that the current LC is the desired LCat step 3012, the signal processor 1250 and 1252 determines whetherL1-POST is available at step 3018. If it is determined that L1-POST isnot available at step 3018, the signal processor 1250 and 1252 moves tothe next RF channel of the current LC at step 3020 before returning tostep 3010 to decode L1-PRE.

In contrast, if it is determined that L1-POST is available at step 3018,the signal processor 1250 and 1252 decodes L1-POST at step 3022 anddecodes the desired PLP, if present, at step 3024. The signal processor1250 and 1252 extracts in-band signaling and track the desired PLP intime and frequency at step 3026, before continuing to step 3028.

Thus, during this continuous reception phase, the receiver does not needto decode L1-PRE and parse it in every NGH frame, as it is able tolocate the LFs of the desired LC. The L1-PRE signaling related to LC andmapping of its LF onto NGH frames advantageously allows for fasteracquisition at the initial scanning phase and initial reception phase.

One example of the signaling field of the configurable L1-POST signaling(L1-CONF) is illustrated below in Table 6:

TABLE 6 OPTIONS_FLAG 8 NUM_STREAMS 8 NUM_PLP_MODES 8 NUM_PLP_PER_LSF 8NUM_PLP_PER_LF 8 LC_NUM_LF 8 LC_LF_SIZE 22 IF OPTIONS_FLAG=“xx1xxxxx”{PARTITION_CYCLE_LENGTH 4 PARTITION_NUM_ADD_PLP 4 } IFOPTIONS_FLAG=“xxxxxxx1”{ SUB_SLICES 15 } for i=0..LC_NUM_RF−1{ LC_RF_IDX3 LC_RF_POS 8 FREQUENCY 32 } for i=0..NUM_PLP_PER_LF{ PLP_ID 8 STREAM_ID 8 PLP_MODE_ID 6 PLP_ANCHOR_FLAG 1 PLP_IN_BAND_A_FLAG 1PLP_GROUP_ID 8 PLP_FIRST_LF_IDX 8 PLP_LF_INTERVAL 8 IF PLP_TYPE=“011” {REUSE_FACTOR 4 REUSE_ID 4 } IF PLP_TYPE=“100” { ALPHA 3 REUSE_FACTOR 3REUSE_SNUM 3 NATIONAL_PLP_ID 8 } IF OPTIONS_FLAG=“xxxxx1xx”{ RESERVED_18 } IF OPTIONS_FLAG=“xx1xxxxx”{ PLP_PARTITION_CLUSTER_ID 2 } } IFOPTIONS_FLAG=“xx1xxxxx”{ for i=0..PARTITION_NUM_ADD_PLP{ RESERVED_2 48IF OPTIONS_FLAG=“xxxxx1xx”{ RESERVED_3 8 } PLP_PARTITION_CLUSTER_ID 2 }} for i=0..NUM_PLP_MODE−1{ PLP_MODE_ID 6 PLP_TYPE 6 PLP_PAYLOAD_TYPE 8PLP_NPDI 1 PLP_ISSY_MODE 2 PLP_FEC_TYPE 2 PLP_COD 4 PLP_ROTATION 1PLP_NON_UNIFORM_CONST 1 IF S1 = “111” and S2 = “000x” or “011x” {PLP_MIMO_TYPE 4 IF PLP_MIMO_TYPE = “0001” or “0010” {PLP_NUM_BITS_PER_CHANNEL_USE 3 } ELSE { PLP_MOD 3 } } ELSE { PLP_MOD 3 }PLP_NUM_BLOCKS_MAX 10 TIME_IL_LENGTH 8 TIME_IL_TYPE 1 IF S1 = “111” andS2 = “001x” or “0x0x” { TIME_IL_LATE_LENGTH 3 NUM_ADD_IUS_PER_LATE_FRAME4 } } IF OPTIONS_FLAG=“xxxxxx1x”{ NUM_AUX 4 AUX_CONFIG_RFU 8 fori=0..NUM_AUX−1{ AUX_STREAM_TYPE 4 AUX_PRIVATE_CONF 28 } } RESERVED_5 8

A number of new fields contained within the example table of an L1-CONFsignaling field in a logical channel structure 2700 are introduced bythe signal processor:

-   -   LC_NUM_LF: This 8-bit field indicates the number of logical        frames in the current logical super-frame of the current logical        channel. The minimum value of this field shall be ‘1’.    -   LC_LF_SIZE: This 22-bit field indicates the size, in QAM cells,        of every logical frame in the current logical super-frame of the        current logical channel.

The following fields appear in the frequency loop:

-   -   LC RF_IDX: This 3-bit field indicates the index of each        FREQUENCY listed within this loop. The LC_RF_IDX value is        allocated a unique value between 0 and LNC_NUM_RF−1. In the case        of frequency bundling or slicing across multiple RF channels        (i.e., LC_TYPE=‘01x’ and LC_NUM_RF>1), this field indicates the        index of each frequency within the structure of the current        logical channel.    -   LC_RF_POS: This 8-bit field indicates the positions of each        FREQUENCY listed within this loop in one cycle of RF channels        used to carry the logical frames of the current logical channel.        If the current logical channel uses only one single RF channel        (i.e., LC_NUM_RF=1), the value of this field shall be equal to        ‘11111111’. A value equal to “1” at the i-^(th) bit position in        the sequence of 8 bits representing this field indicates that        the RF channel with index given by LC_RF_IDX is used at the        i-^(th) position in the cycle of RF channels to carry the        logical frames of the current logical channel. The maximum        length of one cycle of RF channels to carry the logical frames        of a given logical is 8.    -   FREQUENCY: This 32-bit field indicates the center frequency in        Hz of the RF channel whose index is LC_RF_IDX. The order of the        frequencies within the logical channel structure is indicated by        the LC_RF_IDX. The value of FREQUENCY may be set to ‘0’, meaning        that the frequency is not known at the time of constructing the        signal. If this field is set to 0, it shall not be interpreted        as a frequency by a receiver.

The FREQUENCY fields can be used by a receiver to assist in finding thesignals which form a part of the logical channel structure when multipleRF channels are used (i.e., LC_TYPE=‘01x’ and LC_NUM_RF>1). Since thevalue will usually be set at a main transmitter but not modified at atransposer, the accuracy of this field shall not be relied upon.

PLP_FIRST_LF_IDX: This 8-bit field indicates the index of the firstlogical frame of the logical super-frame which carries the current PLP.The value of PLP_FIRST_LF_IDX shall be less than the value ofPLP_LF_INTERVAL.

PLP_LF_INTERVAL: This 8-bit field indicates the interval (I_(JUMP)) in anumber of logical frames between any two logical frames carrying cellsfrom the corresponding PLP within the logical super-frame. For PLPswhich do not appear in every logical frame of the logical super-frame,the value of this field shall equal the interval between successivelogical frames. For example, if a PLP appears on logical frames 1, 4, 7,and the like, this field would be set to ‘3’. For PLPs which appear inevery logical frame, this field shall be set to ‘1’.

One example of the signaling field of the dynamic L1-POST signaling(L1-DYN) is illustrated below in Table 7:

TABLE 7 LF_IDX 8 IF OPTIONS_FLAG=“xxxxxxx1”{ SUB_SLICE_INTERVAL 22 }TYPE_2_START 22 L1CONF_CHANGE_COUNTER 8 RESERVED_1 8 fori=0..NUM_PLP_PER_LSF−1{ PLP_RF_IDX_NEXT 3 for j=0..TIME_IL_LENGTH−1{ 8PLP_NUM_BLOCKS 8 IF OPTIONS_FLAG=“xxx1xxxx”{ RESERVED_2 8 } } } IFOPTIONS_FLAG=“xxxxxx1x”{ for i=0..NUM_AUX−1{ AUX_RFU 48 } } RESERVED_3 8

A number of new fields contained within the example table of an L1-DYNsignaling field in a logical channel structure 2700 are introduced bythe signal processor:

-   -   LF_IDX: This 8-bit field is the index of the current logical        frame within the current logical super-frame. The index of the        first logical frame of the logical super-frame shall be set to        ‘0’.

In some examples, some or all of the steps illustrated in the flowchartsmay be implemented in hardware and/or some or all of the stepsillustrated in the flowchart may be implemented in software. One exampleof the signaling field of the in-band signaling Type-A is illustratedbelow in Table 8:

TABLE 8 Field Size PADDING_TYPE (‘00’) 2 bits PLP_L1_CHANGE_COUNTER 8bits RESERVED_1 8 bits L1_POST_DELTA 24 bits  LC_NEXT_FRAME_DELTA 24bits  CURRENT_PLP_SUB_SLICE_INTERVAL 22 bits  CURRENT_PLP_START_RF_IDX 3bits CURRENT_PLP_START 22 bits  CURRENT_PLP_NUM_BLOCKS 10 bits NUM_ASSOC_PLP 2 bits For i=0..NUM_ASSOC_PLP−1 {  PLP_ID 8 bits PLP_START 22 bits   PLP_NUM_BLOCKS 10 bits   RESERVED_2 8 bits } IFLC_TYPE = “011”{ For j=0..NUM_PLP_PER_LF−1 {  RF_IDX 3 bits  } }NUM_OTHER_PLP_IN_BAND 8 bits For i=0..NUM_OTHER_PLP_IN_BAND−1 { PLP_SUB_SLICE_INTERVAL 22 bits   PLP_START_RF_IDX 3 bits  Forj=0..MAX_TIME_IL_LENGTH−1 {  PLP_ID 8 bits  PLP_START 22 bits  PLP_NUM_BLOCKS 10 bits   PLP_ANCHOR_FLAG 1 bit   }  RESERVED_3 8 bits }For j=0..MAX_TIME_IL_LENGTH−1 {   TYPE_2_START 22 bits  }

L1_POST_DELTA: This 24-bit field indicates the gap, in QAM cells,between the last cell carrying L1-PRE signaling and the first cell ofthe first logical frame starting in the current NGH frame. The value(HEX) FFFFFF means that no new logical frame starts in the current NGHframe.

LC_NEXT_FRAME_DELTA: This 24-bit field indicates the relative timing inT periods between the current NGH frame and the next NGH frame whichcarries the current logical channel.

PLP_RF_IDX_NEXT: For LC type D PLPs this 3-bit field indicates the RFfrequency of the current PLP in the one after the next logical framewhere the PLP occurs. The value shall be interpreted according to theparameter LC_CURRENT_FRAME_RF_IDX of L1-PRE. For LC types A, B and Cthis field shall be reserved for future use.

FIG. 31 illustrates an overview of stages for a transport of dataservices in a delivery system according to an exemplary embodiment ofthe present invention.

Referring to FIG. 31, a general overview 3100 on the stages for thetransport of the data services in the delivery system is provided. Afirst stage involves the mapping of the data services 3112 from theservice layer 3110 to data PLPs 3132 in the transmission layer 3130across the transport layer 3120. The various data services 3112 aresplit into component parts 3122 in the transport layer 3120 and mappedto PLPs 3132. Control data 3124 in the transport layer 3120 is alsomapped to one or more common PLPs 3134 in the transmission layer 3130.

A second stage maps the PLPs 3132 and 3134 onto the logical channels,for example an LC1 3136 and an LC2 3138, according to some exemplaryembodiments of the present invention.

A third stage provides the mapping of the logical channels 3136 and 3138on the physical frames at the different RF channels 3142 used by thedelivery system via a scheduler/multiplexer function 3140, according tosome exemplary embodiments of the present invention.

Although some aspects of the invention have been described withreference to their applicability to a DVB-NGH system, it will beappreciated that exemplary embodiments of the present invention is notlimited to this particular wireless broadcasting system. It is envisagedthat the concept described above may be applied to any other wirelessbroadcasting and communication systems. In addition, although someaspects of the invention have been described with reference to theirapplicability to a DVB-NGH system that ‘piggy-backs’ on to an existingDVB-T2 system, for example using the previously allocated FEFs, it willbe appreciated that the invention may equally be applied to a newstand-alone DVB-NGH (or similar) system.

With regard to the existing DVB-T2 system, the aforementioned conceptsdescribe (at least) one or more of the following novel features (in eachof the receive side and transmit side by configuration and control,processing encoding or decoding of respective processors):

-   -   Concept of logical frame with fixed capacity in QAM cells and        structure of the logical frame with L1-POST (logical signaling),        common PLPs, data PLPs (of different types, in order), auxiliary        streams, and dummy cells,    -   Concept of logical super-frame, where the configurable signaling        remains constant within one logical super-frame, and other        characteristics,    -   ISSY field (in-band type B) carried in every logical frame of        the LC for synchronization purposes,    -   Concept of logical channel with bundling and slicing over the        time and frequency domains and different logical channel types        for mapping of the logical frames and logical super-frames onto        the physical frames,    -   Concept of logical channel group, where all LC members of the        group have their slots enough separated in time so that they can        be received with one single tuner (e.g., so receiver can receive        multiple LCs of the same LC group with one single tuner), and    -   Optimized Layer 1 signaling to reflect all the above features.

Thus, the aforementioned exemplary embodiments of the present inventionhave described signal processors in both the transmit and receive sideto facilitate each of the above new concepts and/or new data formats.The respective signal processors have been described with respect to thetransmit or receive communication units, together with the associatedexemplary methods of operation of the processors. These exemplarymethods of operation may also be stored in executable code to beperformed by any computer-based product.

FIG. 32 illustrates a computing system that may be employed to implementsignal processing functionality according to an exemplary embodiment ofthe present invention. Computing systems of this type may be used inaccess points and wireless communication units. Those skilled in therelevant art will also recognize how to implement the invention usingother computer systems or architectures.

Referring to FIG. 32, a computing system 3200 may represent, forexample, a desktop, a laptop or a notebook computer, a hand-heldcomputing device (a Personal Digital Assistant (PDA), a cell phone, apalmtop, and the like), a mainframe, a server, a client, or any othertype of special or general purpose computing device as may be desirableor appropriate for a given application or environment. Computing system3200 can include one or more processors, such as a processor 3204.Processor 3204 can be implemented using a general or special-purposeprocessing engine, such as a microprocessor, a microcontroller or othercontrol module. In this example, processor 3204 is connected to a bus3202 or other communications medium.

Computing system 3200 can also include a main memory 3208, such as aRandom Access Memory (RAM) or other dynamic memory, for storinginformation and instructions to be executed by processor 3204. Mainmemory 3208 also may be used for storing temporary variables or otherintermediate information during execution of instructions to be executedby processor 3204. Computing system 3200 may include a Read Only Memory(ROM) or other static storage device coupled to bus 3202 for storingstatic information and instructions for processor 3204.

The computing system 3200 may also include information storage devices3210, which may include, for example, a media drive 3212 and a removablestorage interface 3220. The media drive 3212 may include a drive orother mechanism to support fixed or removable storage media, such as ahard disk drive, a floppy disk drive, a magnetic tape drive, an opticaldisk drive, a Compact Disc (CD) or a Digital Video Drive (DVD) read orwrite drive (R or RW), or other removable or fixed media drive. Storagemedia 3218 may include, for example, a hard disk, a floppy disk, amagnetic tape, an optical disk, a CD or a DVD, or other fixed orremovable medium that is read by and written to by the media drive 3212.As these examples illustrate, the storage media 3218 may include acomputer-readable storage medium having particular computer software ordata stored therein.

In alternative exemplary embodiments, information storage devices 3210may include other similar components for allowing computer programs orother instructions or data to be loaded into computing system 3200. Suchcomponents may include, for example, a removable storage unit 3222 andan interface 3220, such as a program cartridge and cartridge interface,a removable memory (for example, a flash memory or other removablememory module) and a memory slot, and other removable storage units 3222and interfaces 3220 that allow software and data to be transferred fromthe removable storage unit 3222 to the computing system 3200.

Computing system 3200 can also include a communications interface 3224.Communications interface 3224 can be used to allow software and data tobe transferred between computing system 3200 and external devices.Examples of communications interface 3224 can include a modem, a networkinterface (such as an Ethernet or other Network Interface Controller(NIC) card), a communications port (such as for example, a UniversalSerial Bus (USB) port), a Personal Computer Memory Card InternationalAssociation (PCMCIA) slot and card, and the like. Software and datatransferred via communications interface 3224 are in the form of signalswhich can be electronic, electromagnetic, and optical or other signalscapable of being received by communications interface 3224. Thesesignals are provided to communications interface 3224 via a channel3228. This channel 3228 may carry signals and may be implemented using awireless medium, a wire or a cable, fiber optics, or othercommunications medium. Some examples of a channel include a phone line,a cellular phone link, an RF link, a network interface, a local or widearea network, and other communications channels.

In exemplary embodiments of the present invention, the terms ‘computerprogram product’ computer-readable medium′ and the like may be usedgenerally to refer to media, such as memory 3208, storage device 3210,or storage unit 3222. These and other forms of computer-readable mediamay store one or more instructions for use by processor 3204, to causethe processor to perform specified operations. Such instructions,generally referred to as ‘computer program code’ (which may be groupedin the form of computer programs or other groupings), when executed,enable the computing system 3200 to perform functions of exemplaryembodiments of the present invention. Note that the code may directlycause the processor to perform specified operations, be compiled toperform specified operations, and/or be combined with other software,hardware, and/or firmware elements (e.g., libraries for performingstandard functions) to perform specified operations.

In an exemplary embodiment where the elements are implemented usingsoftware, the software may be stored in a computer-readable medium andloaded into computing system 3200 using, for example, removable storageunits 3222, media drive 3212, or communications interface 3224. Thecontrol module (in this example, software instructions or computerprogram code), when executed by the processor 3204, causes the processor3204 to perform the functions of the exemplary embodiments of thepresent invention as described herein.

More particularly, it is envisaged that the aforementioned inventiveconcept can be applied by a semiconductor manufacturer to any integratedcircuit comprising a signal processor configured to perform any of theaforementioned operations. Furthermore, the inventive concept can beapplied to any circuit that is able to configure, process, encode and/ordecode signals for wireless distribution. It is further envisaged that,for example, a semiconductor manufacturer may employ the inventiveconcept in a design of a stand-alone device, such as a digital signalprocessor, or Application Specific Integrated Circuit (ASIC) and/or anyother sub-system element.

It will be appreciated that, for clarity purposes, the above descriptionhas described exemplary embodiments of the present invention withreference to different functional units and processors. However, it willbe apparent that any suitable distribution of functionality betweendifferent functional units or processors, for example with respect tothe signal processor 1250 and 1252, may be used without detracting fromthe invention. For example, functionality illustrated to be performed byseparate processors or controllers may be performed by the sameprocessor or controller. Hence, references to specific functional unitsare only to be seen as references to suitable means for providing thedescribed functionality, rather than indicative of a strict logical orphysical structure or organization.

Aspects of the invention may be implemented in any suitable formincluding hardware, software, firmware or any combination of these. Theinvention may optionally be implemented, at least partly, as computersoftware running on one or more data processors and/or digital signalprocessors or configurable module components, such as Field ProgrammableGate Array (FPGA) devices. Thus, the elements and components of anexemplary embodiment of the present invention may be physically,functionally, and logically implemented in any suitable way. Indeed, thefunctionality may be implemented in a single unit, in a plurality ofunits or as part of other functional units.

Although the present invention has been described in connection withsome exemplary embodiments, it is not intended to be limited to thespecific form set forth herein. Rather, the scope of the presentinvention is limited only by the accompanying claims. Additionally,although a feature may appear to be described in connection withparticular exemplary embodiments, one skilled in the art would recognizethat various features of the described exemplary embodiments may becombined in accordance with the invention. In the claims, the term‘comprising’ does not exclude the presence of other elements or steps.

Furthermore, although individually listed, a plurality of means,elements or method steps may be implemented by, for example, a singleunit or processor. Additionally, although individual features may beincluded in different claims, these may possibly be advantageouslycombined, and the inclusion in different claims does not imply that acombination of features is not feasible and/or advantageous. Inaddition, the inclusion of a feature in one category of claims does notimply a limitation to this category, but rather indicates that thefeature is equally applicable to other claim categories, as appropriate.

Thus, signal processors, communication units, a communication system andmethods relating to transmission and reception of data streams indigital video broadcast systems have been described, wherein theaforementioned disadvantages with prior art arrangements have beensubstantially alleviated.

While the invention has been shown and described with reference tocertain exemplary embodiments thereof, it will be understood by thoseskilled in the art that various changes in form and details may be madetherein without departing from the spirit and scope of the invention asdefined by the appended claims and their equivalents.

What is claimed is:
 1. A method of transmitting data in a communicationsystem, the method comprising: receiving data provided from a serviceprovider; generating logical frames comprising delivery units fortransmitting at least one data stream included in the data; andtransmitting the logical frames on at least one logical channel.
 2. Themethod of claim 1, wherein the generating of the logical framescomprises: generating at least one set of the logical frames comprisingthe first set of the delivery units; and transmitting each of the atleast one set of the logical frames on a different logical channel ofthe at least one logical channel.
 3. The method of claim 1, furthercomprising: grouping logical channels having different logical frames.4. The method of claim 1, further comprising: receiving at least oneservice requirement of the service provider; and determining a numberfor each of the logical frames and a number of delivery units includedin each of the logical frames, based on the at least one servicerequirement.
 5. A method of receiving data in a communication system,the method comprising: receiving logical frames transmitted on at leastone logical channel from a transmitter; and decoding the logical framescomprising delivery units for transmitting at least one data streamincluded in the data.
 6. The method of claim 5, wherein the decoding ofthe logical frames comprises: obtaining at least one set of the logicalframes comprising a first set of the delivery units, wherein the atleast one set of the logical frames is received on a different logicalchannel of the at least one logical channel.
 7. The method of claim 5,wherein different logical frames are received on each of the at leastone of the logical channels.
 8. The method of claim 5, wherein a numberfor each of the logical frames and a number of the delivery unitsincluded in each of the logical frames are determined based on the atleast one service requirement of a service provider providing the data.9. A transmitter for transmitting data in a communication system, thetransmitter comprising: a receiving unit configured to receive dataprovided from a service provider; a controller configured to generatelogical frames comprising delivery units configured to transmit at leastone data stream included in the data; and a transmitting unit configuredto transmit the logical frames on at least one logical channel.
 10. Thetransmitter of claim 9, wherein the controller is further configured: togenerate at least one set of the logical frames comprising the first setof the delivery units, and to control the transmitter to transmit the atleast one data stream on a different logical channel of the at least onelogical channel.
 11. The transmitter of claim 9, wherein the controlleris further configured to generate a number of logical channels havingdifferent logical frames.
 12. The transmitter of claim 9, wherein thereceiving unit is further configured to receive at least one servicerequirement of the service provider, and wherein the controller isfurther configured to determine a number for each of the logical framesand a number of the delivery units included in each of the logicalframes, based on the at least one service requirement.
 13. A receiverfor receiving data in a communication system, the receiver comprising: areceiving unit configured to receive logical frames transmitted on atleast one logical channel from a transmitter; and a decoder configuredto decode the logical frames comprising delivery units configured totransmit at least one data stream included in the data.
 14. The receiverof claim 13, wherein the decoder is further configured to obtain atleast one set of the logical frames comprising the first set of thedelivery units, and wherein the at least one set of the logical framesis received on a different logical channel of the at least one logicalchannel.
 15. The receiver of claim 13, wherein the receiving unit isfurther configured to receive different logical frames on each of the atleast one of the logical channels.
 16. The receiver of claim 13, whereina number for each of the logical frames and a number of the deliveryunits included in each of the logical frames are determined based on theat least one service requirement of a service provider providing thedata.